1; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
2; RUN:    -check-prefix=NOT-R6 -check-prefix=GP32
3; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
4; RUN:    -check-prefix=NOT-R6 -check-prefix=GP32
5; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
6; RUN:    -check-prefix=NOT-R6 -check-prefix=GP32
7; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
8; RUN:    -check-prefix=NOT-R6 -check-prefix=GP32
9; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
10; RUN:    -check-prefix=NOT-R6 -check-prefix=GP32
11; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
12; RUN:    -check-prefix=R6 -check-prefix=GP32
13; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
14; RUN:    -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
15; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
16; RUN:    -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
17; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
18; RUN:    -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
19; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
20; RUN:    -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
21; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
22; RUN:    -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
23; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
24; RUN:    -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
25; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
26; RUN:    -check-prefix=R6 -check-prefix=64R6
27
28define zeroext i1 @udiv_i1(i1 zeroext %a, i1 zeroext %b) {
29entry:
30; ALL-LABEL: udiv_i1:
31
32  ; NOT-R6:       divu    $zero, $4, $5
33  ; NOT-R6:       teq     $5, $zero, 7
34  ; NOT-R6:       mflo    $2
35
36  ; R6:           divu    $2, $4, $5
37  ; R6:           teq     $5, $zero, 7
38
39  %r = udiv i1 %a, %b
40  ret i1 %r
41}
42
43define zeroext i8 @udiv_i8(i8 zeroext %a, i8 zeroext %b) {
44entry:
45; ALL-LABEL: udiv_i8:
46
47  ; NOT-R6:       divu    $zero, $4, $5
48  ; NOT-R6:       teq     $5, $zero, 7
49  ; NOT-R6:       mflo    $2
50
51  ; R6:           divu    $2, $4, $5
52  ; R6:           teq     $5, $zero, 7
53
54  %r = udiv i8 %a, %b
55  ret i8 %r
56}
57
58define zeroext i16 @udiv_i16(i16 zeroext %a, i16 zeroext %b) {
59entry:
60; ALL-LABEL: udiv_i16:
61
62  ; NOT-R6:       divu    $zero, $4, $5
63  ; NOT-R6:       teq     $5, $zero, 7
64  ; NOT-R6:       mflo    $2
65
66  ; R6:           divu    $2, $4, $5
67  ; R6:           teq     $5, $zero, 7
68
69  %r = udiv i16 %a, %b
70  ret i16 %r
71}
72
73define signext i32 @udiv_i32(i32 signext %a, i32 signext %b) {
74entry:
75; ALL-LABEL: udiv_i32:
76
77  ; NOT-R6:       divu    $zero, $4, $5
78  ; NOT-R6:       teq     $5, $zero, 7
79  ; NOT-R6:       mflo    $2
80
81  ; R6:           divu    $2, $4, $5
82  ; R6:           teq     $5, $zero, 7
83
84  %r = udiv i32 %a, %b
85  ret i32 %r
86}
87
88define signext i64 @udiv_i64(i64 signext %a, i64 signext %b) {
89entry:
90; ALL-LABEL: udiv_i64:
91
92  ; GP32:         lw      $25, %call16(__udivdi3)($gp)
93
94  ; GP64-NOT-R6:  ddivu   $zero, $4, $5
95  ; GP64-NOT-R6:  teq     $5, $zero, 7
96  ; GP64-NOT-R6:  mflo    $2
97
98  ; 64R6:         ddivu   $2, $4, $5
99  ; 64R6:         teq     $5, $zero, 7
100
101  %r = udiv i64 %a, %b
102  ret i64 %r
103}
104
105define signext i128 @udiv_i128(i128 signext %a, i128 signext %b) {
106entry:
107; ALL-LABEL: udiv_i128:
108
109  ; GP32:         lw      $25, %call16(__udivti3)($gp)
110
111  ; GP64-NOT-R6:  ld      $25, %call16(__udivti3)($gp)
112  ; 64-R6:        ld      $25, %call16(__udivti3)($gp)
113
114  %r = udiv i128 %a, %b
115  ret i128 %r
116}
117