1; RUN: llc -mcpu=pwr8 -mattr=+vsx -O2 -mtriple=powerpc64le-unknown-linux-gnu < %s > %t
2; RUN: grep lxvd2x < %t | count 18
3; RUN: grep stxvd2x < %t | count 18
4; RUN: grep xxpermdi < %t | count 36
5
6@vf = global <4 x float> <float -1.500000e+00, float 2.500000e+00, float -3.500000e+00, float 4.500000e+00>, align 16
7@vd = global <2 x double> <double 3.500000e+00, double -7.500000e+00>, align 16
8@vsi = global <4 x i32> <i32 -1, i32 2, i32 -3, i32 4>, align 16
9@vui = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 16
10@vsll = global <2 x i64> <i64 255, i64 -937>, align 16
11@vull = global <2 x i64> <i64 1447, i64 2894>, align 16
12@res_vsi = common global <4 x i32> zeroinitializer, align 16
13@res_vui = common global <4 x i32> zeroinitializer, align 16
14@res_vf = common global <4 x float> zeroinitializer, align 16
15@res_vsll = common global <2 x i64> zeroinitializer, align 16
16@res_vull = common global <2 x i64> zeroinitializer, align 16
17@res_vd = common global <2 x double> zeroinitializer, align 16
18
19define void @test1() {
20entry:
21; CHECK-LABEL: test1
22  %__a.addr.i31 = alloca i32, align 4
23  %__b.addr.i32 = alloca <4 x i32>*, align 8
24  %__a.addr.i29 = alloca i32, align 4
25  %__b.addr.i30 = alloca <4 x float>*, align 8
26  %__a.addr.i27 = alloca i32, align 4
27  %__b.addr.i28 = alloca <2 x i64>*, align 8
28  %__a.addr.i25 = alloca i32, align 4
29  %__b.addr.i26 = alloca <2 x i64>*, align 8
30  %__a.addr.i23 = alloca i32, align 4
31  %__b.addr.i24 = alloca <2 x double>*, align 8
32  %__a.addr.i20 = alloca <4 x i32>, align 16
33  %__b.addr.i21 = alloca i32, align 4
34  %__c.addr.i22 = alloca <4 x i32>*, align 8
35  %__a.addr.i17 = alloca <4 x i32>, align 16
36  %__b.addr.i18 = alloca i32, align 4
37  %__c.addr.i19 = alloca <4 x i32>*, align 8
38  %__a.addr.i14 = alloca <4 x float>, align 16
39  %__b.addr.i15 = alloca i32, align 4
40  %__c.addr.i16 = alloca <4 x float>*, align 8
41  %__a.addr.i11 = alloca <2 x i64>, align 16
42  %__b.addr.i12 = alloca i32, align 4
43  %__c.addr.i13 = alloca <2 x i64>*, align 8
44  %__a.addr.i8 = alloca <2 x i64>, align 16
45  %__b.addr.i9 = alloca i32, align 4
46  %__c.addr.i10 = alloca <2 x i64>*, align 8
47  %__a.addr.i6 = alloca <2 x double>, align 16
48  %__b.addr.i7 = alloca i32, align 4
49  %__c.addr.i = alloca <2 x double>*, align 8
50  %__a.addr.i = alloca i32, align 4
51  %__b.addr.i = alloca <4 x i32>*, align 8
52  store i32 0, i32* %__a.addr.i, align 4
53  store <4 x i32>* @vsi, <4 x i32>** %__b.addr.i, align 8
54  %0 = load i32, i32* %__a.addr.i, align 4
55  %1 = load <4 x i32>*, <4 x i32>** %__b.addr.i, align 8
56  %2 = bitcast <4 x i32>* %1 to i8*
57  %3 = getelementptr i8, i8* %2, i32 %0
58  %4 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %3)
59  store <4 x i32> %4, <4 x i32>* @res_vsi, align 16
60  store i32 0, i32* %__a.addr.i31, align 4
61  store <4 x i32>* @vui, <4 x i32>** %__b.addr.i32, align 8
62  %5 = load i32, i32* %__a.addr.i31, align 4
63  %6 = load <4 x i32>*, <4 x i32>** %__b.addr.i32, align 8
64  %7 = bitcast <4 x i32>* %6 to i8*
65  %8 = getelementptr i8, i8* %7, i32 %5
66  %9 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %8)
67  store <4 x i32> %9, <4 x i32>* @res_vui, align 16
68  store i32 0, i32* %__a.addr.i29, align 4
69  store <4 x float>* @vf, <4 x float>** %__b.addr.i30, align 8
70  %10 = load i32, i32* %__a.addr.i29, align 4
71  %11 = load <4 x float>*, <4 x float>** %__b.addr.i30, align 8
72  %12 = bitcast <4 x float>* %11 to i8*
73  %13 = getelementptr i8, i8* %12, i32 %10
74  %14 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %13)
75  %15 = bitcast <4 x i32> %14 to <4 x float>
76  store <4 x float> %15, <4 x float>* @res_vf, align 16
77  store i32 0, i32* %__a.addr.i27, align 4
78  store <2 x i64>* @vsll, <2 x i64>** %__b.addr.i28, align 8
79  %16 = load i32, i32* %__a.addr.i27, align 4
80  %17 = load <2 x i64>*, <2 x i64>** %__b.addr.i28, align 8
81  %18 = bitcast <2 x i64>* %17 to i8*
82  %19 = getelementptr i8, i8* %18, i32 %16
83  %20 = call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %19)
84  %21 = bitcast <2 x double> %20 to <2 x i64>
85  store <2 x i64> %21, <2 x i64>* @res_vsll, align 16
86  store i32 0, i32* %__a.addr.i25, align 4
87  store <2 x i64>* @vull, <2 x i64>** %__b.addr.i26, align 8
88  %22 = load i32, i32* %__a.addr.i25, align 4
89  %23 = load <2 x i64>*, <2 x i64>** %__b.addr.i26, align 8
90  %24 = bitcast <2 x i64>* %23 to i8*
91  %25 = getelementptr i8, i8* %24, i32 %22
92  %26 = call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %25)
93  %27 = bitcast <2 x double> %26 to <2 x i64>
94  store <2 x i64> %27, <2 x i64>* @res_vull, align 16
95  store i32 0, i32* %__a.addr.i23, align 4
96  store <2 x double>* @vd, <2 x double>** %__b.addr.i24, align 8
97  %28 = load i32, i32* %__a.addr.i23, align 4
98  %29 = load <2 x double>*, <2 x double>** %__b.addr.i24, align 8
99  %30 = bitcast <2 x double>* %29 to i8*
100  %31 = getelementptr i8, i8* %30, i32 %28
101  %32 = call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %31)
102  store <2 x double> %32, <2 x double>* @res_vd, align 16
103  %33 = load <4 x i32>, <4 x i32>* @vsi, align 16
104  store <4 x i32> %33, <4 x i32>* %__a.addr.i20, align 16
105  store i32 0, i32* %__b.addr.i21, align 4
106  store <4 x i32>* @res_vsi, <4 x i32>** %__c.addr.i22, align 8
107  %34 = load <4 x i32>, <4 x i32>* %__a.addr.i20, align 16
108  %35 = load i32, i32* %__b.addr.i21, align 4
109  %36 = load <4 x i32>*, <4 x i32>** %__c.addr.i22, align 8
110  %37 = bitcast <4 x i32>* %36 to i8*
111  %38 = getelementptr i8, i8* %37, i32 %35
112  call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %34, i8* %38)
113  %39 = load <4 x i32>, <4 x i32>* @vui, align 16
114  store <4 x i32> %39, <4 x i32>* %__a.addr.i17, align 16
115  store i32 0, i32* %__b.addr.i18, align 4
116  store <4 x i32>* @res_vui, <4 x i32>** %__c.addr.i19, align 8
117  %40 = load <4 x i32>, <4 x i32>* %__a.addr.i17, align 16
118  %41 = load i32, i32* %__b.addr.i18, align 4
119  %42 = load <4 x i32>*, <4 x i32>** %__c.addr.i19, align 8
120  %43 = bitcast <4 x i32>* %42 to i8*
121  %44 = getelementptr i8, i8* %43, i32 %41
122  call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %40, i8* %44)
123  %45 = load <4 x float>, <4 x float>* @vf, align 16
124  store <4 x float> %45, <4 x float>* %__a.addr.i14, align 16
125  store i32 0, i32* %__b.addr.i15, align 4
126  store <4 x float>* @res_vf, <4 x float>** %__c.addr.i16, align 8
127  %46 = load <4 x float>, <4 x float>* %__a.addr.i14, align 16
128  %47 = bitcast <4 x float> %46 to <4 x i32>
129  %48 = load i32, i32* %__b.addr.i15, align 4
130  %49 = load <4 x float>*, <4 x float>** %__c.addr.i16, align 8
131  %50 = bitcast <4 x float>* %49 to i8*
132  %51 = getelementptr i8, i8* %50, i32 %48
133  call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %47, i8* %51) #1
134  %52 = load <2 x i64>, <2 x i64>* @vsll, align 16
135  store <2 x i64> %52, <2 x i64>* %__a.addr.i11, align 16
136  store i32 0, i32* %__b.addr.i12, align 4
137  store <2 x i64>* @res_vsll, <2 x i64>** %__c.addr.i13, align 8
138  %53 = load <2 x i64>, <2 x i64>* %__a.addr.i11, align 16
139  %54 = bitcast <2 x i64> %53 to <2 x double>
140  %55 = load i32, i32* %__b.addr.i12, align 4
141  %56 = load <2 x i64>*, <2 x i64>** %__c.addr.i13, align 8
142  %57 = bitcast <2 x i64>* %56 to i8*
143  %58 = getelementptr i8, i8* %57, i32 %55
144  call void @llvm.ppc.vsx.stxvd2x(<2 x double> %54, i8* %58)
145  %59 = load <2 x i64>, <2 x i64>* @vull, align 16
146  store <2 x i64> %59, <2 x i64>* %__a.addr.i8, align 16
147  store i32 0, i32* %__b.addr.i9, align 4
148  store <2 x i64>* @res_vull, <2 x i64>** %__c.addr.i10, align 8
149  %60 = load <2 x i64>, <2 x i64>* %__a.addr.i8, align 16
150  %61 = bitcast <2 x i64> %60 to <2 x double>
151  %62 = load i32, i32* %__b.addr.i9, align 4
152  %63 = load <2 x i64>*, <2 x i64>** %__c.addr.i10, align 8
153  %64 = bitcast <2 x i64>* %63 to i8*
154  %65 = getelementptr i8, i8* %64, i32 %62
155  call void @llvm.ppc.vsx.stxvd2x(<2 x double> %61, i8* %65)
156  %66 = load <2 x double>, <2 x double>* @vd, align 16
157  store <2 x double> %66, <2 x double>* %__a.addr.i6, align 16
158  store i32 0, i32* %__b.addr.i7, align 4
159  store <2 x double>* @res_vd, <2 x double>** %__c.addr.i, align 8
160  %67 = load <2 x double>, <2 x double>* %__a.addr.i6, align 16
161  %68 = load i32, i32* %__b.addr.i7, align 4
162  %69 = load <2 x double>*, <2 x double>** %__c.addr.i, align 8
163  %70 = bitcast <2 x double>* %69 to i8*
164  %71 = getelementptr i8, i8* %70, i32 %68
165  call void @llvm.ppc.vsx.stxvd2x(<2 x double> %67, i8* %71)
166  ret void
167}
168
169declare void @llvm.ppc.vsx.stxvd2x(<2 x double>, i8*)
170declare void @llvm.ppc.vsx.stxvw4x(<4 x i32>, i8*)
171declare <2 x double> @llvm.ppc.vsx.lxvd2x(i8*)
172declare <4 x i32> @llvm.ppc.vsx.lxvw4x(i8*)
173