1; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600
2; RUN: llc < %s -march=amdgcn --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI
3; RUN: llc < %s -march=amdgcn --mcpu=tonga -verify-machineinstrs| FileCheck %s --check-prefix=SI
4
5; R600-LABEL: {{^}}sqrt_f32:
6; R600: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
7; R600: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS
8; SI-LABEL: {{^}}sqrt_f32:
9; SI: v_sqrt_f32_e32
10define void @sqrt_f32(float addrspace(1)* %out, float %in) {
11entry:
12  %0 = call float @llvm.sqrt.f32(float %in)
13  store float %0, float addrspace(1)* %out
14  ret void
15}
16
17; R600-LABEL: {{^}}sqrt_v2f32:
18; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W
19; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS
20; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X
21; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS
22; SI-LABEL: {{^}}sqrt_v2f32:
23; SI: v_sqrt_f32_e32
24; SI: v_sqrt_f32_e32
25define void @sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
26entry:
27  %0 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
28  store <2 x float> %0, <2 x float> addrspace(1)* %out
29  ret void
30}
31
32; R600-LABEL: {{^}}sqrt_v4f32:
33; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y
34; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS
35; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z
36; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS
37; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W
38; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS
39; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X
40; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS
41; SI-LABEL: {{^}}sqrt_v4f32:
42; SI: v_sqrt_f32_e32
43; SI: v_sqrt_f32_e32
44; SI: v_sqrt_f32_e32
45; SI: v_sqrt_f32_e32
46define void @sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
47entry:
48  %0 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
49  store <4 x float> %0, <4 x float> addrspace(1)* %out
50  ret void
51}
52
53declare float @llvm.sqrt.f32(float %in)
54declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
55declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
56