1; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=knl | FileCheck -check-prefix=X32 %s
2; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=knl | FileCheck -check-prefix=X32 %s
3; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=knl | FileCheck -check-prefix=WIN64 %s
4; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck -check-prefix=X64 %s
5
6declare <16 x float> @func_float16_ptr(<16 x float>, <16 x float> *)
7declare <16 x float> @func_float16(<16 x float>, <16 x float>)
8declare i32 @func_int(i32, i32)
9
10; WIN64-LABEL: testf16_inp
11; WIN64: vaddps  {{.*}}, {{%zmm[0-1]}}
12; WIN64: leaq    {{.*}}(%rsp), %rcx
13; WIN64: call
14; WIN64: ret
15
16; X32-LABEL: testf16_inp
17; X32: vaddps  {{.*}}, {{%zmm[0-1]}}
18; X32: movl    %eax, (%esp)
19; X32: call
20; X32: ret
21
22; X64-LABEL: testf16_inp
23; X64: vaddps  {{.*}}, {{%zmm[0-1]}}
24; X64: leaq    {{.*}}(%rsp), %rdi
25; X64: call
26; X64: ret
27
28;test calling conventions - input parameters
29define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {
30  %y = alloca <16 x float>, align 16
31  %x = fadd <16 x float> %a, %b
32  %1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, <16 x float>* %y)
33  %2 = load <16 x float>, <16 x float>* %y, align 16
34  %3 = fadd <16 x float> %2, %1
35  ret <16 x float> %3
36}
37
38;test calling conventions - preserved registers
39
40; preserved zmm16-
41; WIN64-LABEL: testf16_regs
42; WIN64: call
43; WIN64: vaddps  %zmm16, %zmm0, %zmm0
44; WIN64: ret
45
46; preserved zmm16-
47; X64-LABEL: testf16_regs
48; X64: call
49; X64: vaddps  %zmm16, %zmm0, %zmm0
50; X64: ret
51
52define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {
53  %y = alloca <16 x float>, align 16
54  %x = fadd <16 x float> %a, %b
55  %1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, <16 x float>* %y)
56  %2 = load <16 x float>, <16 x float>* %y, align 16
57  %3 = fadd <16 x float> %1, %b
58  %4 = fadd <16 x float> %2, %3
59  ret <16 x float> %4
60}
61
62; test calling conventions - prolog and epilog
63; WIN64-LABEL: test_prolog_epilog
64; WIN64: vmovups %zmm21, {{.*(%rbp).*}}     # 64-byte Spill
65; WIN64: vmovups %zmm6, {{.*(%rbp).*}}     # 64-byte Spill
66; WIN64: call
67; WIN64: vmovups {{.*(%rbp).*}}, %zmm6      # 64-byte Reload
68; WIN64: vmovups {{.*(%rbp).*}}, %zmm21     # 64-byte Reload
69
70; X64-LABEL: test_prolog_epilog
71; X64:  kmovw   %k7, {{.*}}(%rsp)         ## 8-byte Folded Spill
72; X64:  kmovw   %k6, {{.*}}(%rsp)         ## 8-byte Folded Spill
73; X64:  kmovw   %k5, {{.*}}(%rsp)         ## 8-byte Folded Spill
74; X64:  kmovw   %k4, {{.*}}(%rsp)         ## 8-byte Folded Spill
75; X64: vmovups %zmm31, {{.*}}(%rsp)  ## 64-byte Spill
76; X64: vmovups %zmm16, {{.*}}(%rsp)  ## 64-byte Spill
77; X64: call
78; X64: vmovups {{.*}}(%rsp), %zmm16 ## 64-byte Reload
79; X64: vmovups {{.*}}(%rsp), %zmm31 ## 64-byte Reload
80define intel_ocl_bicc <16 x float> @test_prolog_epilog(<16 x float> %a, <16 x float> %b) nounwind {
81   %c = call <16 x float> @func_float16(<16 x float> %a, <16 x float> %b)
82   ret <16 x float> %c
83}
84
85
86declare <16 x float> @func_float16_mask(<16 x float>, <16 x i1>)
87
88; X64-LABEL: testf16_inp_mask
89; X64: kmovw   %edi, %k1
90; X64: call
91define <16 x float> @testf16_inp_mask(<16 x float> %a, i16 %mask)  {
92  %imask = bitcast i16 %mask to <16 x i1>
93  %1 = call intel_ocl_bicc <16 x float> @func_float16_mask(<16 x float> %a, <16 x i1> %imask)
94  ret <16 x float> %1
95}
96
97; X64-LABEL: test_prolog_epilog_with_mask
98; X64: kxorw   %k{{.*}}, %k{{.*}}, %k1
99; X64: call
100define intel_ocl_bicc <16 x float> @test_prolog_epilog_with_mask(<16 x float> %a, <16 x i32> %x1, <16 x i32>%x2, <16 x i1> %mask) nounwind {
101   %cmp_res = icmp eq <16 x i32>%x1, %x2
102   %mask1 = xor <16 x i1> %cmp_res, %mask
103   %c = call intel_ocl_bicc <16 x float> @func_float16_mask(<16 x float> %a, <16 x i1>%mask1)
104   ret <16 x float> %c
105}