1; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE2
2; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
3
4define <8 x i16> @test1(<8 x i16> %A, <8 x i16> %B) {
5; SSE2-LABEL: test1:
6; SSE2:       # BB#0: # %entry
7; SSE2-NEXT:    movd %xmm1, %eax
8; SSE2-NEXT:    movzwl %ax, %eax
9; SSE2-NEXT:    movd %eax, %xmm1
10; SSE2-NEXT:    psllw %xmm1, %xmm0
11; SSE2-NEXT:    retq
12;
13; AVX-LABEL: test1:
14; AVX:       # BB#0: # %entry
15; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
16; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3,4,5,6,7]
17; AVX-NEXT:    vpsllw %xmm1, %xmm0, %xmm0
18; AVX-NEXT:    retq
19entry:
20  %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
21  %shl = shl <8 x i16> %A, %vecinit14
22  ret <8 x i16> %shl
23}
24
25define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) {
26; SSE2-LABEL: test2:
27; SSE2:       # BB#0: # %entry
28; SSE2-NEXT:    xorps %xmm2, %xmm2
29; SSE2-NEXT:    movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
30; SSE2-NEXT:    pslld %xmm2, %xmm0
31; SSE2-NEXT:    retq
32;
33; AVX-LABEL: test2:
34; AVX:       # BB#0: # %entry
35; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
36; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
37; AVX-NEXT:    vpslld %xmm1, %xmm0, %xmm0
38; AVX-NEXT:    retq
39entry:
40  %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
41  %shl = shl <4 x i32> %A, %vecinit6
42  ret <4 x i32> %shl
43}
44
45define <2 x i64> @test3(<2 x i64> %A, <2 x i64> %B) {
46; SSE2-LABEL: test3:
47; SSE2:       # BB#0: # %entry
48; SSE2-NEXT:    psllq %xmm1, %xmm0
49; SSE2-NEXT:    retq
50;
51; AVX-LABEL: test3:
52; AVX:       # BB#0: # %entry
53; AVX-NEXT:    vpsllq %xmm1, %xmm0, %xmm0
54; AVX-NEXT:    retq
55entry:
56  %vecinit2 = shufflevector <2 x i64> %B, <2 x i64> undef, <2 x i32> zeroinitializer
57  %shl = shl <2 x i64> %A, %vecinit2
58  ret <2 x i64> %shl
59}
60
61define <8 x i16> @test4(<8 x i16> %A, <8 x i16> %B) {
62; SSE2-LABEL: test4:
63; SSE2:       # BB#0: # %entry
64; SSE2-NEXT:    movd %xmm1, %eax
65; SSE2-NEXT:    movzwl %ax, %eax
66; SSE2-NEXT:    movd %eax, %xmm1
67; SSE2-NEXT:    psrlw %xmm1, %xmm0
68; SSE2-NEXT:    retq
69;
70; AVX-LABEL: test4:
71; AVX:       # BB#0: # %entry
72; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
73; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3,4,5,6,7]
74; AVX-NEXT:    vpsrlw %xmm1, %xmm0, %xmm0
75; AVX-NEXT:    retq
76entry:
77  %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
78  %shr = lshr <8 x i16> %A, %vecinit14
79  ret <8 x i16> %shr
80}
81
82define <4 x i32> @test5(<4 x i32> %A, <4 x i32> %B) {
83; SSE2-LABEL: test5:
84; SSE2:       # BB#0: # %entry
85; SSE2-NEXT:    xorps %xmm2, %xmm2
86; SSE2-NEXT:    movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
87; SSE2-NEXT:    psrld %xmm2, %xmm0
88; SSE2-NEXT:    retq
89;
90; AVX-LABEL: test5:
91; AVX:       # BB#0: # %entry
92; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
93; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
94; AVX-NEXT:    vpsrld %xmm1, %xmm0, %xmm0
95; AVX-NEXT:    retq
96entry:
97  %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
98  %shr = lshr <4 x i32> %A, %vecinit6
99  ret <4 x i32> %shr
100}
101
102define <2 x i64> @test6(<2 x i64> %A, <2 x i64> %B) {
103; SSE2-LABEL: test6:
104; SSE2:       # BB#0: # %entry
105; SSE2-NEXT:    psrlq %xmm1, %xmm0
106; SSE2-NEXT:    retq
107;
108; AVX-LABEL: test6:
109; AVX:       # BB#0: # %entry
110; AVX-NEXT:    vpsrlq %xmm1, %xmm0, %xmm0
111; AVX-NEXT:    retq
112entry:
113  %vecinit2 = shufflevector <2 x i64> %B, <2 x i64> undef, <2 x i32> zeroinitializer
114  %shr = lshr <2 x i64> %A, %vecinit2
115  ret <2 x i64> %shr
116}
117
118define <8 x i16> @test7(<8 x i16> %A, <8 x i16> %B) {
119; SSE2-LABEL: test7:
120; SSE2:       # BB#0: # %entry
121; SSE2-NEXT:    movd %xmm1, %eax
122; SSE2-NEXT:    movzwl %ax, %eax
123; SSE2-NEXT:    movd %eax, %xmm1
124; SSE2-NEXT:    psraw %xmm1, %xmm0
125; SSE2-NEXT:    retq
126;
127; AVX-LABEL: test7:
128; AVX:       # BB#0: # %entry
129; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
130; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3,4,5,6,7]
131; AVX-NEXT:    vpsraw %xmm1, %xmm0, %xmm0
132; AVX-NEXT:    retq
133entry:
134  %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
135  %shr = ashr <8 x i16> %A, %vecinit14
136  ret <8 x i16> %shr
137}
138
139define <4 x i32> @test8(<4 x i32> %A, <4 x i32> %B) {
140; SSE2-LABEL: test8:
141; SSE2:       # BB#0: # %entry
142; SSE2-NEXT:    xorps %xmm2, %xmm2
143; SSE2-NEXT:    movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
144; SSE2-NEXT:    psrad %xmm2, %xmm0
145; SSE2-NEXT:    retq
146;
147; AVX-LABEL: test8:
148; AVX:       # BB#0: # %entry
149; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
150; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
151; AVX-NEXT:    vpsrad %xmm1, %xmm0, %xmm0
152; AVX-NEXT:    retq
153entry:
154  %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
155  %shr = ashr <4 x i32> %A, %vecinit6
156  ret <4 x i32> %shr
157}
158