1; RUN: llc -mtriple=x86_64-apple-macosx < %s | FileCheck %s 2; rdar://7610418 3 4%ptr = type { i8* } 5%struct.s1 = type { %ptr, %ptr } 6%struct.s2 = type { i32, i8*, i8*, [256 x %struct.s1*], [8 x i32], i64, i8*, i32, i64, i64, i32, %struct.s3*, %struct.s3*, [49 x i64] } 7%struct.s3 = type { %struct.s3*, %struct.s3*, i32, i32, i32 } 8 9define fastcc i8* @t(i32 %base) nounwind { 10entry: 11; CHECK-LABEL: t: 12; CHECK: leaq (%rax,%rax,4) 13 %0 = zext i32 %base to i64 14 %1 = getelementptr inbounds %struct.s2, %struct.s2* null, i64 %0 15 br i1 undef, label %bb1, label %bb2 16 17bb1: 18; CHECK: %bb1 19; CHECK-NOT: shlq $9 20; CHECK-NOT: leaq 21; CHECK: call 22 %2 = getelementptr inbounds %struct.s2, %struct.s2* null, i64 %0, i32 0 23 call void @bar(i32* %2) nounwind 24 unreachable 25 26bb2: 27; CHECK: %bb2 28; CHECK-NOT: leaq 29; CHECK: callq 30 %3 = call fastcc i8* @foo(%struct.s2* %1) nounwind 31 unreachable 32 33bb3: 34 ret i8* undef 35} 36 37declare void @bar(i32*) 38 39declare fastcc i8* @foo(%struct.s2*) nounwind 40 41; rdar://8773371 42 43declare void @printf(...) nounwind 44 45define void @commute(i32 %test_case, i32 %scale) nounwind ssp { 46; CHECK-LABEL: commute: 47entry: 48 switch i32 %test_case, label %sw.bb307 [ 49 i32 1, label %sw.bb 50 i32 2, label %sw.bb 51 i32 3, label %sw.bb 52 ] 53 54sw.bb: ; preds = %entry, %entry, %entry 55; CHECK: %sw.bb 56; CHECK: imull 57 %mul = mul nsw i32 %test_case, 3 58 %mul20 = mul nsw i32 %mul, %scale 59 br i1 undef, label %if.end34, label %sw.bb307 60 61if.end34: ; preds = %sw.bb 62; CHECK: %if.end34 63; CHECK: leal 64; CHECK-NOT: imull 65 tail call void (...) @printf(i32 %test_case, i32 %mul20) nounwind 66 %tmp = mul i32 %scale, %test_case 67 %tmp752 = mul i32 %tmp, 3 68 %tmp753 = zext i32 %tmp752 to i64 69 br label %bb.nph743.us 70 71for.body53.us: ; preds = %bb.nph743.us, %for.body53.us 72 %exitcond = icmp eq i64 undef, %tmp753 73 br i1 %exitcond, label %bb.nph743.us, label %for.body53.us 74 75bb.nph743.us: ; preds = %for.body53.us, %if.end34 76 br label %for.body53.us 77 78sw.bb307: ; preds = %sw.bb, %entry 79 ret void 80} 81 82; CSE physical register defining instruction across MBB boundary. 83; rdar://10660865 84define i32 @cross_mbb_phys_cse(i32 %a, i32 %b) nounwind ssp { 85entry: 86; CHECK-LABEL: cross_mbb_phys_cse: 87; CHECK: cmpl 88; CHECK: ja 89 %cmp = icmp ugt i32 %a, %b 90 br i1 %cmp, label %return, label %if.end 91 92if.end: ; preds = %entry 93; CHECK-NOT: cmpl 94; CHECK: sbbl 95 %cmp1 = icmp ult i32 %a, %b 96 %. = sext i1 %cmp1 to i32 97 br label %return 98 99return: ; preds = %if.end, %entry 100 %retval.0 = phi i32 [ 1, %entry ], [ %., %if.end ] 101 ret i32 %retval.0 102} 103 104; rdar://11393714 105define i8* @bsd_memchr(i8* %s, i32 %a, i32 %c, i64 %n) nounwind ssp { 106; CHECK: %entry 107; CHECK: xorl 108; CHECK: %preheader 109; CHECK: %do.body 110; CHECK-NOT: xorl 111; CHECK: %do.cond 112; CHECK-NOT: xorl 113; CHECK: %return 114entry: 115 %cmp = icmp eq i64 %n, 0 116 br i1 %cmp, label %return, label %preheader 117 118preheader: 119 %conv2 = and i32 %c, 255 120 br label %do.body 121 122do.body: 123 %n.addr.0 = phi i64 [ %dec, %do.cond ], [ %n, %preheader ] 124 %p.0 = phi i8* [ %incdec.ptr, %do.cond ], [ %s, %preheader ] 125 %cmp3 = icmp eq i32 %a, %conv2 126 br i1 %cmp3, label %return, label %do.cond 127 128do.cond: 129 %incdec.ptr = getelementptr inbounds i8, i8* %p.0, i64 1 130 %dec = add i64 %n.addr.0, -1 131 %cmp6 = icmp eq i64 %dec, 0 132 br i1 %cmp6, label %return, label %do.body 133 134return: 135 %retval.0 = phi i8* [ null, %entry ], [ null, %do.cond ], [ %p.0, %do.body ] 136 ret i8* %retval.0 137} 138 139; PR13578 140@t2_global = external global i32 141 142declare i1 @t2_func() 143 144define i32 @t2() { 145 store i32 42, i32* @t2_global 146 %c = call i1 @t2_func() 147 br i1 %c, label %a, label %b 148 149a: 150 %l = load i32, i32* @t2_global 151 ret i32 %l 152 153b: 154 ret i32 0 155 156; CHECK-LABEL: t2: 157; CHECK: t2_global@GOTPCREL(%rip) 158; CHECK-NOT: t2_global@GOTPCREL(%rip) 159} 160