1; These are tests for SSE3 codegen. 2 3; RUN: llc < %s -march=x86-64 -mcpu=nocona -mtriple=i686-apple-darwin9 -O3 | FileCheck %s --check-prefix=X64 4 5; Test for v8xi16 lowering where we extract the first element of the vector and 6; placed it in the second element of the result. 7 8define void @t0(<8 x i16>* %dest, <8 x i16>* %old) nounwind { 9; X64-LABEL: t0: 10; X64: ## BB#0: ## %entry 11; X64-NEXT: movl $1, %eax 12; X64-NEXT: movd %eax, %xmm0 13; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3] 14; X64-NEXT: movdqa %xmm0, (%rdi) 15; X64-NEXT: retq 16entry: 17 %tmp3 = load <8 x i16>, <8 x i16>* %old 18 %tmp6 = shufflevector <8 x i16> %tmp3, 19 <8 x i16> < i16 1, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef >, 20 <8 x i32> < i32 8, i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef > 21 store <8 x i16> %tmp6, <8 x i16>* %dest 22 ret void 23} 24 25define <8 x i16> @t1(<8 x i16>* %A, <8 x i16>* %B) nounwind { 26; X64-LABEL: t1: 27; X64: ## BB#0: 28; X64-NEXT: movaps {{.*#+}} xmm0 = [0,65535,65535,65535,65535,65535,65535,65535] 29; X64-NEXT: movaps %xmm0, %xmm1 30; X64-NEXT: andnps (%rsi), %xmm1 31; X64-NEXT: andps (%rdi), %xmm0 32; X64-NEXT: orps %xmm1, %xmm0 33; X64-NEXT: retq 34 %tmp1 = load <8 x i16>, <8 x i16>* %A 35 %tmp2 = load <8 x i16>, <8 x i16>* %B 36 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > 37 ret <8 x i16> %tmp3 38 39} 40 41define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind { 42; X64-LABEL: t2: 43; X64: ## BB#0: 44; X64-NEXT: movdqa {{.*#+}} xmm2 = [0,65535,65535,0,65535,65535,65535,65535] 45; X64-NEXT: pand %xmm2, %xmm0 46; X64-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[1,1,2,1,4,5,6,7] 47; X64-NEXT: pandn %xmm1, %xmm2 48; X64-NEXT: por %xmm2, %xmm0 49; X64-NEXT: retq 50 %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 9, i32 1, i32 2, i32 9, i32 4, i32 5, i32 6, i32 7 > 51 ret <8 x i16> %tmp 52} 53 54define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind { 55; X64-LABEL: t3: 56; X64: ## BB#0: 57; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0] 58; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5,6,5] 59; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0] 60; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,3,2,1,4,5,6,7] 61; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4] 62; X64-NEXT: retq 63 %tmp = shufflevector <8 x i16> %A, <8 x i16> %A, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 > 64 ret <8 x i16> %tmp 65} 66 67define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind { 68; X64-LABEL: t4: 69; X64: ## BB#0: 70; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,0,3] 71; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,4,7] 72; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0] 73; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,7,4,7] 74; X64-NEXT: retq 75 %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 > 76 ret <8 x i16> %tmp 77} 78 79define <8 x i16> @t5(<8 x i16> %A, <8 x i16> %B) nounwind { 80; X64-LABEL: t5: 81; X64: ## BB#0: 82; X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 83; X64-NEXT: movdqa %xmm1, %xmm0 84; X64-NEXT: retq 85 %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 0, i32 1, i32 10, i32 11, i32 2, i32 3 > 86 ret <8 x i16> %tmp 87} 88 89define <8 x i16> @t6(<8 x i16> %A, <8 x i16> %B) nounwind { 90; X64-LABEL: t6: 91; X64: ## BB#0: 92; X64-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] 93; X64-NEXT: retq 94 %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > 95 ret <8 x i16> %tmp 96} 97 98define <8 x i16> @t7(<8 x i16> %A, <8 x i16> %B) nounwind { 99; X64-LABEL: t7: 100; X64: ## BB#0: 101; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,3,2,4,5,6,7] 102; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,4,7] 103; X64-NEXT: retq 104 %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 0, i32 3, i32 2, i32 4, i32 6, i32 4, i32 7 > 105 ret <8 x i16> %tmp 106} 107 108define void @t8(<2 x i64>* %res, <2 x i64>* %A) nounwind { 109; X64-LABEL: t8: 110; X64: ## BB#0: 111; X64-NEXT: pshuflw {{.*#+}} xmm0 = mem[2,1,0,3,4,5,6,7] 112; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,4,7] 113; X64-NEXT: movdqa %xmm0, (%rdi) 114; X64-NEXT: retq 115 %tmp = load <2 x i64>, <2 x i64>* %A 116 %tmp.upgrd.1 = bitcast <2 x i64> %tmp to <8 x i16> 117 %tmp0 = extractelement <8 x i16> %tmp.upgrd.1, i32 0 118 %tmp1 = extractelement <8 x i16> %tmp.upgrd.1, i32 1 119 %tmp2 = extractelement <8 x i16> %tmp.upgrd.1, i32 2 120 %tmp3 = extractelement <8 x i16> %tmp.upgrd.1, i32 3 121 %tmp4 = extractelement <8 x i16> %tmp.upgrd.1, i32 4 122 %tmp5 = extractelement <8 x i16> %tmp.upgrd.1, i32 5 123 %tmp6 = extractelement <8 x i16> %tmp.upgrd.1, i32 6 124 %tmp7 = extractelement <8 x i16> %tmp.upgrd.1, i32 7 125 %tmp8 = insertelement <8 x i16> undef, i16 %tmp2, i32 0 126 %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 1 127 %tmp10 = insertelement <8 x i16> %tmp9, i16 %tmp0, i32 2 128 %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 3 129 %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp6, i32 4 130 %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 5 131 %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp4, i32 6 132 %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 7 133 %tmp15.upgrd.2 = bitcast <8 x i16> %tmp15 to <2 x i64> 134 store <2 x i64> %tmp15.upgrd.2, <2 x i64>* %res 135 ret void 136} 137 138define void @t9(<4 x float>* %r, <2 x i32>* %A) nounwind { 139; X64-LABEL: t9: 140; X64: ## BB#0: 141; X64-NEXT: movapd (%rdi), %xmm0 142; X64-NEXT: movhpd (%rsi), %xmm0 143; X64-NEXT: movapd %xmm0, (%rdi) 144; X64-NEXT: retq 145 %tmp = load <4 x float>, <4 x float>* %r 146 %tmp.upgrd.3 = bitcast <2 x i32>* %A to double* 147 %tmp.upgrd.4 = load double, double* %tmp.upgrd.3 148 %tmp.upgrd.5 = insertelement <2 x double> undef, double %tmp.upgrd.4, i32 0 149 %tmp5 = insertelement <2 x double> %tmp.upgrd.5, double undef, i32 1 150 %tmp6 = bitcast <2 x double> %tmp5 to <4 x float> 151 %tmp.upgrd.6 = extractelement <4 x float> %tmp, i32 0 152 %tmp7 = extractelement <4 x float> %tmp, i32 1 153 %tmp8 = extractelement <4 x float> %tmp6, i32 0 154 %tmp9 = extractelement <4 x float> %tmp6, i32 1 155 %tmp10 = insertelement <4 x float> undef, float %tmp.upgrd.6, i32 0 156 %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, i32 1 157 %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, i32 2 158 %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3 159 store <4 x float> %tmp13, <4 x float>* %r 160 ret void 161} 162 163 164 165; FIXME: This testcase produces icky code. It can be made much better! 166; PR2585 167 168@g1 = external constant <4 x i32> 169@g2 = external constant <4 x i16> 170 171define void @t10() nounwind { 172; X64-LABEL: t10: 173; X64: ## BB#0: 174; X64-NEXT: movq _g1@{{.*}}(%rip), %rax 175; X64-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7] 176; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] 177; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 178; X64-NEXT: movq _g2@{{.*}}(%rip), %rax 179; X64-NEXT: movq %xmm0, (%rax) 180; X64-NEXT: retq 181 load <4 x i32>, <4 x i32>* @g1, align 16 182 bitcast <4 x i32> %1 to <8 x i16> 183 shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef > 184 bitcast <8 x i16> %3 to <2 x i64> 185 extractelement <2 x i64> %4, i32 0 186 bitcast i64 %5 to <4 x i16> 187 store <4 x i16> %6, <4 x i16>* @g2, align 8 188 ret void 189} 190 191; Pack various elements via shuffles. 192define <8 x i16> @t11(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { 193; X64-LABEL: t11: 194; X64: ## BB#0: ## %entry 195; X64-NEXT: psrld $16, %xmm0 196; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 197; X64-NEXT: retq 198entry: 199 %tmp7 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > 200 ret <8 x i16> %tmp7 201 202} 203 204define <8 x i16> @t12(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { 205; X64-LABEL: t12: 206; X64: ## BB#0: ## %entry 207; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 208; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 209; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,7,6,7] 210; X64-NEXT: retq 211entry: 212 %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef > 213 ret <8 x i16> %tmp9 214 215} 216 217define <8 x i16> @t13(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { 218; X64-LABEL: t13: 219; X64: ## BB#0: ## %entry 220; X64-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 221; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm1[0,2,2,3,4,5,6,7] 222; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,7,6,7] 223; X64-NEXT: retq 224entry: 225 %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef > 226 ret <8 x i16> %tmp9 227} 228 229define <8 x i16> @t14(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { 230; X64-LABEL: t14: 231; X64: ## BB#0: ## %entry 232; X64-NEXT: psrlq $16, %xmm0 233; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] 234; X64-NEXT: movdqa %xmm1, %xmm0 235; X64-NEXT: retq 236entry: 237 %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef > 238 ret <8 x i16> %tmp9 239} 240 241; FIXME: t15 is worse off from disabling of scheduler 2-address hack. 242define <8 x i16> @t15(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { 243; X64-LABEL: t15: 244; X64: ## BB#0: ## %entry 245; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 246; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,1,2,4,5,6,7] 247; X64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 248; X64-NEXT: retq 249entry: 250 %tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef > 251 ret <8 x i16> %tmp8 252} 253 254; Test yonah where we convert a shuffle to pextrw and pinrsw 255define <16 x i8> @t16(<16 x i8> %T0) nounwind readnone { 256; X64-LABEL: t16: 257; X64: ## BB#0: ## %entry 258; X64-NEXT: movdqa {{.*#+}} xmm1 = [0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0] 259; X64-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 260; X64-NEXT: movdqa %xmm1, %xmm0 261; X64-NEXT: retq 262entry: 263 %tmp8 = shufflevector <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > 264 %tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 2, i32 17, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > 265 ret <16 x i8> %tmp9 266} 267 268; rdar://8520311 269define <4 x i32> @t17() nounwind { 270; X64-LABEL: t17: 271; X64: ## BB#0: ## %entry 272; X64-NEXT: movddup {{.*#+}} xmm0 = mem[0,0] 273; X64-NEXT: andpd {{.*}}(%rip), %xmm0 274; X64-NEXT: retq 275entry: 276 %tmp1 = load <4 x float>, <4 x float>* undef, align 16 277 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> <i32 4, i32 1, i32 2, i32 3> 278 %tmp3 = load <4 x float>, <4 x float>* undef, align 16 279 %tmp4 = shufflevector <4 x float> %tmp2, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1> 280 %tmp5 = bitcast <4 x float> %tmp3 to <4 x i32> 281 %tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1> 282 %tmp7 = and <4 x i32> %tmp6, <i32 undef, i32 undef, i32 -1, i32 0> 283 ret <4 x i32> %tmp7 284} 285