1@ RUN: llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s | FileCheck %s
2@ RUN: not llvm-mc -triple=thumbv6 -show-encoding 2>&1 < %s | FileCheck %s --check-prefix=CHECK-V6M
3  .syntax unified
4  .globl _func
5
6@ Check that the assembler can handle the documented syntax from the ARM ARM.
7@ These tests test instruction encodings specific to ARMv7m.
8
9@------------------------------------------------------------------------------
10@ MRS
11@------------------------------------------------------------------------------
12
13        mrs  r0, basepri
14        mrs  r0, basepri_max
15        mrs  r0, faultmask
16
17@ CHECK: mrs	r0, basepri             @ encoding: [0xef,0xf3,0x11,0x80]
18@ CHECK: mrs	r0, basepri_max         @ encoding: [0xef,0xf3,0x12,0x80]
19@ CHECK: mrs	r0, faultmask           @ encoding: [0xef,0xf3,0x13,0x80]
20
21@------------------------------------------------------------------------------
22@ MSR
23@------------------------------------------------------------------------------
24
25        msr  basepri, r0
26        msr  basepri_max, r0
27        msr  faultmask, r0
28
29@ CHECK: msr	basepri, r0             @ encoding: [0x80,0xf3,0x11,0x88]
30@ CHECK: msr	basepri_max, r0         @ encoding: [0x80,0xf3,0x12,0x88]
31@ CHECK: msr	faultmask, r0           @ encoding: [0x80,0xf3,0x13,0x88]
32
33@ CHECK-V6M: error: invalid operand for instruction
34@ CHECK-V6M-NEXT: mrs r0, basepri
35@ CHECK-V6M: error: invalid operand for instruction
36@ CHECK-V6M-NEXT: mrs r0, basepri_max
37@ CHECK-V6M: error: invalid operand for instruction
38@ CHECK-V6M-NEXT: mrs r0, faultmask
39@ CHECK-V6M: error: invalid operand for instruction
40@ CHECK-V6M-NEXT: msr basepri, r0
41@ CHECK-V6M: error: invalid operand for instruction
42@ CHECK-V6M-NEXT: msr basepri_max, r0
43@ CHECK-V6M: error: invalid operand for instruction
44@ CHECK-V6M-NEXT: msr faultmask, r0
45
46