1; RUN: opt < %s -instcombine -S | FileCheck %s 2; This test makes sure that these instructions are properly eliminated. 3; PR1822 4 5target datalayout = "e-p:64:64-p1:16:16-p2:32:32:32-p3:64:64:64" 6 7define i32 @test1(i32 %A, i32 %B) { 8 %C = select i1 false, i32 %A, i32 %B 9 ret i32 %C 10; CHECK-LABEL: @test1( 11; CHECK: ret i32 %B 12} 13 14define i32 @test2(i32 %A, i32 %B) { 15 %C = select i1 true, i32 %A, i32 %B 16 ret i32 %C 17; CHECK-LABEL: @test2( 18; CHECK: ret i32 %A 19} 20 21 22define i32 @test3(i1 %C, i32 %I) { 23 ; V = I 24 %V = select i1 %C, i32 %I, i32 %I 25 ret i32 %V 26; CHECK-LABEL: @test3( 27; CHECK: ret i32 %I 28} 29 30define i1 @test4(i1 %C) { 31 ; V = C 32 %V = select i1 %C, i1 true, i1 false 33 ret i1 %V 34; CHECK-LABEL: @test4( 35; CHECK: ret i1 %C 36} 37 38define i1 @test5(i1 %C) { 39 ; V = !C 40 %V = select i1 %C, i1 false, i1 true 41 ret i1 %V 42; CHECK-LABEL: @test5( 43; CHECK: xor i1 %C, true 44; CHECK: ret i1 45} 46 47define i32 @test6(i1 %C) { 48 ; V = cast C to int 49 %V = select i1 %C, i32 1, i32 0 50 ret i32 %V 51; CHECK-LABEL: @test6( 52; CHECK: %V = zext i1 %C to i32 53; CHECK: ret i32 %V 54} 55 56define i1 @test7(i1 %C, i1 %X) { 57 ; R = or C, X 58 %R = select i1 %C, i1 true, i1 %X 59 ret i1 %R 60; CHECK-LABEL: @test7( 61; CHECK: %R = or i1 %C, %X 62; CHECK: ret i1 %R 63} 64 65define i1 @test8(i1 %C, i1 %X) { 66 ; R = and C, X 67 %R = select i1 %C, i1 %X, i1 false 68 ret i1 %R 69; CHECK-LABEL: @test8( 70; CHECK: %R = and i1 %C, %X 71; CHECK: ret i1 %R 72} 73 74define i1 @test9(i1 %C, i1 %X) { 75 ; R = and !C, X 76 %R = select i1 %C, i1 false, i1 %X 77 ret i1 %R 78; CHECK-LABEL: @test9( 79; CHECK: xor i1 %C, true 80; CHECK: %R = and i1 81; CHECK: ret i1 %R 82} 83 84define i1 @test10(i1 %C, i1 %X) { 85 ; R = or !C, X 86 %R = select i1 %C, i1 %X, i1 true 87 ret i1 %R 88; CHECK-LABEL: @test10( 89; CHECK: xor i1 %C, true 90; CHECK: %R = or i1 91; CHECK: ret i1 %R 92} 93 94define i32 @test11(i32 %a) { 95 %C = icmp eq i32 %a, 0 96 %R = select i1 %C, i32 0, i32 1 97 ret i32 %R 98; CHECK-LABEL: @test11( 99; CHECK: icmp ne i32 %a, 0 100; CHECK: %R = zext i1 101; CHECK: ret i32 %R 102} 103 104define i32 @test12(i1 %cond, i32 %a) { 105 %b = or i32 %a, 1 106 %c = select i1 %cond, i32 %b, i32 %a 107 ret i32 %c 108; CHECK-LABEL: @test12( 109; CHECK: %b = zext i1 %cond to i32 110; CHECK: %c = or i32 %b, %a 111; CHECK: ret i32 %c 112} 113 114define i32 @test12a(i1 %cond, i32 %a) { 115 %b = ashr i32 %a, 1 116 %c = select i1 %cond, i32 %b, i32 %a 117 ret i32 %c 118; CHECK-LABEL: @test12a( 119; CHECK: %b = zext i1 %cond to i32 120; CHECK: %c = ashr i32 %a, %b 121; CHECK: ret i32 %c 122} 123 124define i32 @test12b(i1 %cond, i32 %a) { 125 %b = ashr i32 %a, 1 126 %c = select i1 %cond, i32 %a, i32 %b 127 ret i32 %c 128; CHECK-LABEL: @test12b( 129; CHECK: zext i1 %cond to i32 130; CHECK: %b = xor i32 131; CHECK: %c = ashr i32 %a, %b 132; CHECK: ret i32 %c 133} 134 135define i32 @test13(i32 %a, i32 %b) { 136 %C = icmp eq i32 %a, %b 137 %V = select i1 %C, i32 %a, i32 %b 138 ret i32 %V 139; CHECK-LABEL: @test13( 140; CHECK: ret i32 %b 141} 142 143define i32 @test13a(i32 %a, i32 %b) { 144 %C = icmp ne i32 %a, %b 145 %V = select i1 %C, i32 %a, i32 %b 146 ret i32 %V 147; CHECK-LABEL: @test13a( 148; CHECK: ret i32 %a 149} 150 151define i32 @test13b(i32 %a, i32 %b) { 152 %C = icmp eq i32 %a, %b 153 %V = select i1 %C, i32 %b, i32 %a 154 ret i32 %V 155; CHECK-LABEL: @test13b( 156; CHECK: ret i32 %a 157} 158 159define i1 @test14a(i1 %C, i32 %X) { 160 %V = select i1 %C, i32 %X, i32 0 161 ; (X < 1) | !C 162 %R = icmp slt i32 %V, 1 163 ret i1 %R 164; CHECK-LABEL: @test14a( 165; CHECK: icmp slt i32 %X, 1 166; CHECK: xor i1 %C, true 167; CHECK: or i1 168; CHECK: ret i1 %R 169} 170 171define i1 @test14b(i1 %C, i32 %X) { 172 %V = select i1 %C, i32 0, i32 %X 173 ; (X < 1) | C 174 %R = icmp slt i32 %V, 1 175 ret i1 %R 176; CHECK-LABEL: @test14b( 177; CHECK: icmp slt i32 %X, 1 178; CHECK: or i1 179; CHECK: ret i1 %R 180} 181 182;; Code sequence for (X & 16) ? 16 : 0 183define i32 @test15a(i32 %X) { 184 %t1 = and i32 %X, 16 185 %t2 = icmp eq i32 %t1, 0 186 %t3 = select i1 %t2, i32 0, i32 16 187 ret i32 %t3 188; CHECK-LABEL: @test15a( 189; CHECK: %t1 = and i32 %X, 16 190; CHECK: ret i32 %t1 191} 192 193;; Code sequence for (X & 32) ? 0 : 24 194define i32 @test15b(i32 %X) { 195 %t1 = and i32 %X, 32 196 %t2 = icmp eq i32 %t1, 0 197 %t3 = select i1 %t2, i32 32, i32 0 198 ret i32 %t3 199; CHECK-LABEL: @test15b( 200; CHECK: %t1 = and i32 %X, 32 201; CHECK: xor i32 %t1, 32 202; CHECK: ret i32 203} 204 205;; Alternate code sequence for (X & 16) ? 16 : 0 206define i32 @test15c(i32 %X) { 207 %t1 = and i32 %X, 16 208 %t2 = icmp eq i32 %t1, 16 209 %t3 = select i1 %t2, i32 16, i32 0 210 ret i32 %t3 211; CHECK-LABEL: @test15c( 212; CHECK: %t1 = and i32 %X, 16 213; CHECK: ret i32 %t1 214} 215 216;; Alternate code sequence for (X & 16) ? 16 : 0 217define i32 @test15d(i32 %X) { 218 %t1 = and i32 %X, 16 219 %t2 = icmp ne i32 %t1, 0 220 %t3 = select i1 %t2, i32 16, i32 0 221 ret i32 %t3 222; CHECK-LABEL: @test15d( 223; CHECK: %t1 = and i32 %X, 16 224; CHECK: ret i32 %t1 225} 226 227;; (a & 128) ? 256 : 0 228define i32 @test15e(i32 %X) { 229 %t1 = and i32 %X, 128 230 %t2 = icmp ne i32 %t1, 0 231 %t3 = select i1 %t2, i32 256, i32 0 232 ret i32 %t3 233; CHECK-LABEL: @test15e( 234; CHECK: %t1 = shl i32 %X, 1 235; CHECK: and i32 %t1, 256 236; CHECK: ret i32 237} 238 239;; (a & 128) ? 0 : 256 240define i32 @test15f(i32 %X) { 241 %t1 = and i32 %X, 128 242 %t2 = icmp ne i32 %t1, 0 243 %t3 = select i1 %t2, i32 0, i32 256 244 ret i32 %t3 245; CHECK-LABEL: @test15f( 246; CHECK: %t1 = shl i32 %X, 1 247; CHECK: and i32 %t1, 256 248; CHECK: xor i32 %{{.*}}, 256 249; CHECK: ret i32 250} 251 252;; (a & 8) ? -1 : -9 253define i32 @test15g(i32 %X) { 254 %t1 = and i32 %X, 8 255 %t2 = icmp ne i32 %t1, 0 256 %t3 = select i1 %t2, i32 -1, i32 -9 257 ret i32 %t3 258; CHECK-LABEL: @test15g( 259; CHECK-NEXT: %1 = or i32 %X, -9 260; CHECK-NEXT: ret i32 %1 261} 262 263;; (a & 8) ? -9 : -1 264define i32 @test15h(i32 %X) { 265 %t1 = and i32 %X, 8 266 %t2 = icmp ne i32 %t1, 0 267 %t3 = select i1 %t2, i32 -9, i32 -1 268 ret i32 %t3 269; CHECK-LABEL: @test15h( 270; CHECK-NEXT: %1 = or i32 %X, -9 271; CHECK-NEXT: %2 = xor i32 %1, 8 272; CHECK-NEXT: ret i32 %2 273} 274 275;; (a & 2) ? 577 : 1089 276define i32 @test15i(i32 %X) { 277 %t1 = and i32 %X, 2 278 %t2 = icmp ne i32 %t1, 0 279 %t3 = select i1 %t2, i32 577, i32 1089 280 ret i32 %t3 281; CHECK-LABEL: @test15i( 282; CHECK-NEXT: %t1 = shl i32 %X, 8 283; CHECK-NEXT: %1 = and i32 %t1, 512 284; CHECK-NEXT: %2 = xor i32 %1, 512 285; CHECK-NEXT: %3 = add nuw nsw i32 %2, 577 286; CHECK-NEXT: ret i32 %3 287} 288 289;; (a & 2) ? 1089 : 577 290define i32 @test15j(i32 %X) { 291 %t1 = and i32 %X, 2 292 %t2 = icmp ne i32 %t1, 0 293 %t3 = select i1 %t2, i32 1089, i32 577 294 ret i32 %t3 295; CHECK-LABEL: @test15j( 296; CHECK-NEXT: %t1 = shl i32 %X, 8 297; CHECK-NEXT: %1 = and i32 %t1, 512 298; CHECK-NEXT: %2 = add nuw nsw i32 %1, 577 299; CHECK-NEXT: ret i32 %2 300} 301 302define i32 @test16(i1 %C, i32* %P) { 303 %P2 = select i1 %C, i32* %P, i32* null 304 %V = load i32, i32* %P2 305 ret i32 %V 306; CHECK-LABEL: @test16( 307; CHECK-NEXT: %V = load i32, i32* %P 308; CHECK: ret i32 %V 309} 310 311;; It may be legal to load from a null address in a non-zero address space 312define i32 @test16_neg(i1 %C, i32 addrspace(1)* %P) { 313 %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null 314 %V = load i32, i32 addrspace(1)* %P2 315 ret i32 %V 316; CHECK-LABEL: @test16_neg 317; CHECK-NEXT: %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null 318; CHECK-NEXT: %V = load i32, i32 addrspace(1)* %P2 319; CHECK: ret i32 %V 320} 321define i32 @test16_neg2(i1 %C, i32 addrspace(1)* %P) { 322 %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P 323 %V = load i32, i32 addrspace(1)* %P2 324 ret i32 %V 325; CHECK-LABEL: @test16_neg2 326; CHECK-NEXT: %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P 327; CHECK-NEXT: %V = load i32, i32 addrspace(1)* %P2 328; CHECK: ret i32 %V 329} 330 331define i1 @test17(i32* %X, i1 %C) { 332 %R = select i1 %C, i32* %X, i32* null 333 %RV = icmp eq i32* %R, null 334 ret i1 %RV 335; CHECK-LABEL: @test17( 336; CHECK: icmp eq i32* %X, null 337; CHECK: xor i1 %C, true 338; CHECK: %RV = or i1 339; CHECK: ret i1 %RV 340} 341 342define i32 @test18(i32 %X, i32 %Y, i1 %C) { 343 %R = select i1 %C, i32 %X, i32 0 344 %V = sdiv i32 %Y, %R 345 ret i32 %V 346; CHECK-LABEL: @test18( 347; CHECK: %V = sdiv i32 %Y, %X 348; CHECK: ret i32 %V 349} 350 351define i32 @test19(i32 %x) { 352 %tmp = icmp ugt i32 %x, 2147483647 353 %retval = select i1 %tmp, i32 -1, i32 0 354 ret i32 %retval 355; CHECK-LABEL: @test19( 356; CHECK-NEXT: ashr i32 %x, 31 357; CHECK-NEXT: ret i32 358} 359 360define i32 @test20(i32 %x) { 361 %tmp = icmp slt i32 %x, 0 362 %retval = select i1 %tmp, i32 -1, i32 0 363 ret i32 %retval 364; CHECK-LABEL: @test20( 365; CHECK-NEXT: ashr i32 %x, 31 366; CHECK-NEXT: ret i32 367} 368 369define i64 @test21(i32 %x) { 370 %tmp = icmp slt i32 %x, 0 371 %retval = select i1 %tmp, i64 -1, i64 0 372 ret i64 %retval 373; CHECK-LABEL: @test21( 374; CHECK-NEXT: ashr i32 %x, 31 375; CHECK-NEXT: sext i32 376; CHECK-NEXT: ret i64 377} 378 379define i16 @test22(i32 %x) { 380 %tmp = icmp slt i32 %x, 0 381 %retval = select i1 %tmp, i16 -1, i16 0 382 ret i16 %retval 383; CHECK-LABEL: @test22( 384; CHECK-NEXT: ashr i32 %x, 31 385; CHECK-NEXT: trunc i32 386; CHECK-NEXT: ret i16 387} 388 389define i1 @test23(i1 %a, i1 %b) { 390 %c = select i1 %a, i1 %b, i1 %a 391 ret i1 %c 392; CHECK-LABEL: @test23( 393; CHECK-NEXT: %c = and i1 %a, %b 394; CHECK-NEXT: ret i1 %c 395} 396 397define i1 @test24(i1 %a, i1 %b) { 398 %c = select i1 %a, i1 %a, i1 %b 399 ret i1 %c 400; CHECK-LABEL: @test24( 401; CHECK-NEXT: %c = or i1 %a, %b 402; CHECK-NEXT: ret i1 %c 403} 404 405define i32 @test25(i1 %c) { 406entry: 407 br i1 %c, label %jump, label %ret 408jump: 409 br label %ret 410ret: 411 %a = phi i1 [true, %jump], [false, %entry] 412 %b = select i1 %a, i32 10, i32 20 413 ret i32 %b 414; CHECK-LABEL: @test25( 415; CHECK: %a = phi i32 [ 10, %jump ], [ 20, %entry ] 416; CHECK-NEXT: ret i32 %a 417} 418 419define i32 @test26(i1 %cond) { 420entry: 421 br i1 %cond, label %jump, label %ret 422jump: 423 %c = or i1 false, false 424 br label %ret 425ret: 426 %a = phi i1 [true, %entry], [%c, %jump] 427 %b = select i1 %a, i32 20, i32 10 428 ret i32 %b 429; CHECK-LABEL: @test26( 430; CHECK: %a = phi i32 [ 20, %entry ], [ 10, %jump ] 431; CHECK-NEXT: ret i32 %a 432} 433 434define i32 @test27(i1 %c, i32 %A, i32 %B) { 435entry: 436 br i1 %c, label %jump, label %ret 437jump: 438 br label %ret 439ret: 440 %a = phi i1 [true, %jump], [false, %entry] 441 %b = select i1 %a, i32 %A, i32 %B 442 ret i32 %b 443; CHECK-LABEL: @test27( 444; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 445; CHECK-NEXT: ret i32 %a 446} 447 448define i32 @test28(i1 %cond, i32 %A, i32 %B) { 449entry: 450 br i1 %cond, label %jump, label %ret 451jump: 452 br label %ret 453ret: 454 %c = phi i32 [%A, %jump], [%B, %entry] 455 %a = phi i1 [true, %jump], [false, %entry] 456 %b = select i1 %a, i32 %A, i32 %c 457 ret i32 %b 458; CHECK-LABEL: @test28( 459; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 460; CHECK-NEXT: ret i32 %a 461} 462 463define i32 @test29(i1 %cond, i32 %A, i32 %B) { 464entry: 465 br i1 %cond, label %jump, label %ret 466jump: 467 br label %ret 468ret: 469 %c = phi i32 [%A, %jump], [%B, %entry] 470 %a = phi i1 [true, %jump], [false, %entry] 471 br label %next 472 473next: 474 %b = select i1 %a, i32 %A, i32 %c 475 ret i32 %b 476; CHECK-LABEL: @test29( 477; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 478; CHECK: ret i32 %a 479} 480 481 482; SMAX(SMAX(x, y), x) -> SMAX(x, y) 483define i32 @test30(i32 %x, i32 %y) { 484 %cmp = icmp sgt i32 %x, %y 485 %cond = select i1 %cmp, i32 %x, i32 %y 486 487 %cmp5 = icmp sgt i32 %cond, %x 488 %retval = select i1 %cmp5, i32 %cond, i32 %x 489 ret i32 %retval 490; CHECK-LABEL: @test30( 491; CHECK: ret i32 %cond 492} 493 494; UMAX(UMAX(x, y), x) -> UMAX(x, y) 495define i32 @test31(i32 %x, i32 %y) { 496 %cmp = icmp ugt i32 %x, %y 497 %cond = select i1 %cmp, i32 %x, i32 %y 498 %cmp5 = icmp ugt i32 %cond, %x 499 %retval = select i1 %cmp5, i32 %cond, i32 %x 500 ret i32 %retval 501; CHECK-LABEL: @test31( 502; CHECK: ret i32 %cond 503} 504 505; SMIN(SMIN(x, y), x) -> SMIN(x, y) 506define i32 @test32(i32 %x, i32 %y) { 507 %cmp = icmp sgt i32 %x, %y 508 %cond = select i1 %cmp, i32 %y, i32 %x 509 %cmp5 = icmp sgt i32 %cond, %x 510 %retval = select i1 %cmp5, i32 %x, i32 %cond 511 ret i32 %retval 512; CHECK-LABEL: @test32( 513; CHECK: ret i32 %cond 514} 515 516; MAX(MIN(x, y), x) -> x 517define i32 @test33(i32 %x, i32 %y) { 518 %cmp = icmp sgt i32 %x, %y 519 %cond = select i1 %cmp, i32 %y, i32 %x 520 %cmp5 = icmp sgt i32 %cond, %x 521 %retval = select i1 %cmp5, i32 %cond, i32 %x 522 ret i32 %retval 523; CHECK-LABEL: @test33( 524; CHECK: ret i32 %x 525} 526 527; MIN(MAX(x, y), x) -> x 528define i32 @test34(i32 %x, i32 %y) { 529 %cmp = icmp sgt i32 %x, %y 530 %cond = select i1 %cmp, i32 %x, i32 %y 531 %cmp5 = icmp sgt i32 %cond, %x 532 %retval = select i1 %cmp5, i32 %x, i32 %cond 533 ret i32 %retval 534; CHECK-LABEL: @test34( 535; CHECK: ret i32 %x 536} 537 538define i32 @test35(i32 %x) { 539 %cmp = icmp sge i32 %x, 0 540 %cond = select i1 %cmp, i32 60, i32 100 541 ret i32 %cond 542; CHECK-LABEL: @test35( 543; CHECK: ashr i32 %x, 31 544; CHECK: and i32 {{.*}}, 40 545; CHECK: add nuw nsw i32 {{.*}}, 60 546; CHECK: ret 547} 548 549define i32 @test36(i32 %x) { 550 %cmp = icmp slt i32 %x, 0 551 %cond = select i1 %cmp, i32 60, i32 100 552 ret i32 %cond 553; CHECK-LABEL: @test36( 554; CHECK: ashr i32 %x, 31 555; CHECK: and i32 {{.*}}, -40 556; CHECK: add nsw i32 {{.*}}, 100 557; CHECK: ret 558} 559 560define i32 @test37(i32 %x) { 561 %cmp = icmp sgt i32 %x, -1 562 %cond = select i1 %cmp, i32 1, i32 -1 563 ret i32 %cond 564; CHECK-LABEL: @test37( 565; CHECK: ashr i32 %x, 31 566; CHECK: or i32 {{.*}}, 1 567; CHECK: ret 568} 569 570define i1 @test38(i1 %cond) { 571 %zero = alloca i32 572 %one = alloca i32 573 %ptr = select i1 %cond, i32* %zero, i32* %one 574 %isnull = icmp eq i32* %ptr, null 575 ret i1 %isnull 576; CHECK-LABEL: @test38( 577; CHECK: ret i1 false 578} 579 580define i1 @test39(i1 %cond, double %x) { 581 %s = select i1 %cond, double %x, double 0x7FF0000000000000 ; RHS = +infty 582 %cmp = fcmp ule double %x, %s 583 ret i1 %cmp 584; CHECK-LABEL: @test39( 585; CHECK: ret i1 true 586} 587 588define i1 @test40(i1 %cond) { 589 %a = alloca i32 590 %b = alloca i32 591 %c = alloca i32 592 %s = select i1 %cond, i32* %a, i32* %b 593 %r = icmp eq i32* %s, %c 594 ret i1 %r 595; CHECK-LABEL: @test40( 596; CHECK: ret i1 false 597} 598 599define i32 @test41(i1 %cond, i32 %x, i32 %y) { 600 %z = and i32 %x, %y 601 %s = select i1 %cond, i32 %y, i32 %z 602 %r = and i32 %x, %s 603 ret i32 %r 604; CHECK-LABEL: @test41( 605; CHECK-NEXT: and i32 %x, %y 606; CHECK-NEXT: ret i32 607} 608 609define i32 @test42(i32 %x, i32 %y) { 610 %b = add i32 %y, -1 611 %cond = icmp eq i32 %x, 0 612 %c = select i1 %cond, i32 %b, i32 %y 613 ret i32 %c 614; CHECK-LABEL: @test42( 615; CHECK-NEXT: %cond = icmp eq i32 %x, 0 616; CHECK-NEXT: %b = sext i1 %cond to i32 617; CHECK-NEXT: %c = add i32 %b, %y 618; CHECK-NEXT: ret i32 %c 619} 620 621define i64 @test43(i32 %a) nounwind { 622 %a_ext = sext i32 %a to i64 623 %is_a_nonnegative = icmp sgt i32 %a, -1 624 %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 0 625 ret i64 %max 626; CHECK-LABEL: @test43( 627; CHECK-NEXT: %a_ext = sext i32 %a to i64 628; CHECK-NEXT: %is_a_nonnegative = icmp slt i64 %a_ext, 0 629; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 0, i64 %a_ext 630; CHECK-NEXT: ret i64 %max 631} 632 633define i64 @test44(i32 %a) nounwind { 634 %a_ext = sext i32 %a to i64 635 %is_a_nonpositive = icmp slt i32 %a, 1 636 %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 0 637 ret i64 %min 638; CHECK-LABEL: @test44( 639; CHECK-NEXT: %a_ext = sext i32 %a to i64 640; CHECK-NEXT: %is_a_nonpositive = icmp sgt i64 %a_ext, 0 641; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 0, i64 %a_ext 642; CHECK-NEXT: ret i64 %min 643} 644define i64 @test45(i32 %a) nounwind { 645 %a_ext = zext i32 %a to i64 646 %is_a_nonnegative = icmp ugt i32 %a, 2 647 %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3 648 ret i64 %max 649; CHECK-LABEL: @test45( 650; CHECK-NEXT: %a_ext = zext i32 %a to i64 651; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3 652; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext 653; CHECK-NEXT: ret i64 %max 654} 655 656define i64 @test46(i32 %a) nounwind { 657 %a_ext = zext i32 %a to i64 658 %is_a_nonpositive = icmp ult i32 %a, 3 659 %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 660 ret i64 %min 661; CHECK-LABEL: @test46( 662; CHECK-NEXT: %a_ext = zext i32 %a to i64 663; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 664; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext 665; CHECK-NEXT: ret i64 %min 666} 667define i64 @test47(i32 %a) nounwind { 668 %a_ext = sext i32 %a to i64 669 %is_a_nonnegative = icmp ugt i32 %a, 2 670 %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3 671 ret i64 %max 672; CHECK-LABEL: @test47( 673; CHECK-NEXT: %a_ext = sext i32 %a to i64 674; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3 675; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext 676; CHECK-NEXT: ret i64 %max 677} 678 679define i64 @test48(i32 %a) nounwind { 680 %a_ext = sext i32 %a to i64 681 %is_a_nonpositive = icmp ult i32 %a, 3 682 %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 683 ret i64 %min 684; CHECK-LABEL: @test48( 685; CHECK-NEXT: %a_ext = sext i32 %a to i64 686; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 687; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext 688; CHECK-NEXT: ret i64 %min 689} 690 691define i64 @test49(i32 %a) nounwind { 692 %a_ext = sext i32 %a to i64 693 %is_a_nonpositive = icmp ult i32 %a, 3 694 %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext 695 ret i64 %min 696; CHECK-LABEL: @test49( 697; CHECK-NEXT: %a_ext = sext i32 %a to i64 698; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 699; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 700; CHECK-NEXT: ret i64 %min 701} 702define i64 @test50(i32 %a) nounwind { 703 %is_a_nonpositive = icmp ult i32 %a, 3 704 %a_ext = sext i32 %a to i64 705 %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext 706 ret i64 %min 707; CHECK-LABEL: @test50( 708; CHECK-NEXT: %a_ext = sext i32 %a to i64 709; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 710; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 711; CHECK-NEXT: ret i64 %min 712} 713 714; PR8994 715 716; This select instruction can't be eliminated because trying to do so would 717; change the number of vector elements. This used to assert. 718define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) { 719; CHECK-LABEL: @test51( 720 %select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp 721; CHECK: select <3 x i1> 722 %tmp2 = bitcast <3 x i16> %select to i48 723 ret i48 %tmp2 724} 725 726; PR8575 727 728define i32 @test52(i32 %n, i32 %m) nounwind { 729; CHECK-LABEL: @test52( 730 %cmp = icmp sgt i32 %n, %m 731 %. = select i1 %cmp, i32 1, i32 3 732 %add = add nsw i32 %., 3 733 %storemerge = select i1 %cmp, i32 %., i32 %add 734; CHECK: select i1 %cmp, i32 1, i32 6 735 ret i32 %storemerge 736} 737 738; PR9454 739define i32 @test53(i32 %x) nounwind { 740 %and = and i32 %x, 2 741 %cmp = icmp eq i32 %and, %x 742 %sel = select i1 %cmp, i32 2, i32 1 743 ret i32 %sel 744; CHECK-LABEL: @test53( 745; CHECK: select i1 %cmp 746; CHECK: ret 747} 748 749define i32 @test54(i32 %X, i32 %Y) { 750 %A = ashr exact i32 %X, %Y 751 %B = icmp eq i32 %A, 0 752 %C = select i1 %B, i32 %A, i32 1 753 ret i32 %C 754; CHECK-LABEL: @test54( 755; CHECK-NOT: ashr 756; CHECK-NOT: select 757; CHECK: icmp ne i32 %X, 0 758; CHECK: zext 759; CHECK: ret 760} 761 762define i1 @test55(i1 %X, i32 %Y, i32 %Z) { 763 %A = ashr exact i32 %Y, %Z 764 %B = select i1 %X, i32 %Y, i32 %A 765 %C = icmp eq i32 %B, 0 766 ret i1 %C 767; CHECK-LABEL: @test55( 768; CHECK-NOT: ashr 769; CHECK-NOT: select 770; CHECK: icmp eq 771; CHECK: ret i1 772} 773 774define i32 @test56(i16 %x) nounwind { 775 %tobool = icmp eq i16 %x, 0 776 %conv = zext i16 %x to i32 777 %cond = select i1 %tobool, i32 0, i32 %conv 778 ret i32 %cond 779; CHECK-LABEL: @test56( 780; CHECK-NEXT: zext 781; CHECK-NEXT: ret 782} 783 784define i32 @test57(i32 %x, i32 %y) nounwind { 785 %and = and i32 %x, %y 786 %tobool = icmp eq i32 %x, 0 787 %.and = select i1 %tobool, i32 0, i32 %and 788 ret i32 %.and 789; CHECK-LABEL: @test57( 790; CHECK-NEXT: and i32 %x, %y 791; CHECK-NEXT: ret 792} 793 794define i32 @test58(i16 %x) nounwind { 795 %tobool = icmp ne i16 %x, 1 796 %conv = zext i16 %x to i32 797 %cond = select i1 %tobool, i32 %conv, i32 1 798 ret i32 %cond 799; CHECK-LABEL: @test58( 800; CHECK-NEXT: zext 801; CHECK-NEXT: ret 802} 803 804define i32 @test59(i32 %x, i32 %y) nounwind { 805 %and = and i32 %x, %y 806 %tobool = icmp ne i32 %x, %y 807 %.and = select i1 %tobool, i32 %and, i32 %y 808 ret i32 %.and 809; CHECK-LABEL: @test59( 810; CHECK-NEXT: and i32 %x, %y 811; CHECK-NEXT: ret 812} 813 814define i1 @test60(i32 %x, i1* %y) nounwind { 815 %cmp = icmp eq i32 %x, 0 816 %load = load i1, i1* %y, align 1 817 %cmp1 = icmp slt i32 %x, 1 818 %sel = select i1 %cmp, i1 %load, i1 %cmp1 819 ret i1 %sel 820; CHECK-LABEL: @test60( 821; CHECK: select 822} 823 824@glbl = constant i32 10 825define i32 @test61(i32* %ptr) { 826 %A = load i32, i32* %ptr 827 %B = icmp eq i32* %ptr, @glbl 828 %C = select i1 %B, i32 %A, i32 10 829 ret i32 %C 830; CHECK-LABEL: @test61( 831; CHECK: ret i32 10 832} 833 834define i1 @test62(i1 %A, i1 %B) { 835 %not = xor i1 %A, true 836 %C = select i1 %A, i1 %not, i1 %B 837 ret i1 %C 838; CHECK-LABEL: @test62( 839; CHECK: %not = xor i1 %A, true 840; CHECK: %C = and i1 %not, %B 841; CHECK: ret i1 %C 842} 843 844define i1 @test63(i1 %A, i1 %B) { 845 %not = xor i1 %A, true 846 %C = select i1 %A, i1 %B, i1 %not 847 ret i1 %C 848; CHECK-LABEL: @test63( 849; CHECK: %not = xor i1 %A, true 850; CHECK: %C = or i1 %B, %not 851; CHECK: ret i1 %C 852} 853 854; PR14131 855define void @test64(i32 %p, i16 %b) noreturn nounwind { 856entry: 857 %p.addr.0.insert.mask = and i32 %p, -65536 858 %conv2 = and i32 %p, 65535 859 br i1 undef, label %lor.rhs, label %lor.end 860 861lor.rhs: 862 %p.addr.0.extract.trunc = trunc i32 %p.addr.0.insert.mask to i16 863 %phitmp = zext i16 %p.addr.0.extract.trunc to i32 864 br label %lor.end 865 866lor.end: 867 %t.1 = phi i32 [ 0, %entry ], [ %phitmp, %lor.rhs ] 868 %conv6 = zext i16 %b to i32 869 %div = udiv i32 %conv6, %t.1 870 %tobool8 = icmp eq i32 %div, 0 871 %cmp = icmp eq i32 %t.1, 0 872 %cmp12 = icmp ult i32 %conv2, 2 873 %cmp.sink = select i1 %tobool8, i1 %cmp12, i1 %cmp 874 br i1 %cmp.sink, label %cond.end17, label %cond.false16 875 876cond.false16: 877 br label %cond.end17 878 879cond.end17: 880 br label %while.body 881 882while.body: 883 br label %while.body 884; CHECK-LABEL: @test64( 885; CHECK-NOT: select 886} 887 888; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2( 889; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 %x, 1 890; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], 2 891; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y 892; CHECK-NEXT: ret i32 [[OR]] 893define i32 @select_icmp_eq_and_1_0_or_2(i32 %x, i32 %y) { 894 %and = and i32 %x, 1 895 %cmp = icmp eq i32 %and, 0 896 %or = or i32 %y, 2 897 %select = select i1 %cmp, i32 %y, i32 %or 898 ret i32 %select 899} 900 901; CHECK-LABEL: @select_icmp_eq_and_32_0_or_8( 902; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 2 903; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 8 904; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y 905; CHECK-NEXT: ret i32 [[OR]] 906define i32 @select_icmp_eq_and_32_0_or_8(i32 %x, i32 %y) { 907 %and = and i32 %x, 32 908 %cmp = icmp eq i32 %and, 0 909 %or = or i32 %y, 8 910 %select = select i1 %cmp, i32 %y, i32 %or 911 ret i32 %select 912} 913 914; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_4096( 915; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 4096 916; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 4096 917; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y 918; CHECK-NEXT: ret i32 [[OR]] 919define i32 @select_icmp_ne_0_and_4096_or_4096(i32 %x, i32 %y) { 920 %and = and i32 %x, 4096 921 %cmp = icmp ne i32 0, %and 922 %or = or i32 %y, 4096 923 %select = select i1 %cmp, i32 %y, i32 %or 924 ret i32 %select 925} 926 927; CHECK-LABEL: @select_icmp_eq_and_4096_0_or_4096( 928; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 4096 929; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y 930; CHECK-NEXT: ret i32 [[OR]] 931define i32 @select_icmp_eq_and_4096_0_or_4096(i32 %x, i32 %y) { 932 %and = and i32 %x, 4096 933 %cmp = icmp eq i32 %and, 0 934 %or = or i32 %y, 4096 935 %select = select i1 %cmp, i32 %y, i32 %or 936 ret i32 %select 937} 938 939; CHECK-LABEL: @select_icmp_eq_0_and_1_or_1( 940; CHECK-NEXT: [[TRUNC:%.+]] = trunc i64 %x to i32 941; CHECK-NEXT: [[AND:%.+]] = and i32 [[TRUNC]], 1 942; CHECK-NEXT: [[OR:%.+]] = or i32 [[XOR]], %y 943; CHECK-NEXT: ret i32 [[OR]] 944define i32 @select_icmp_eq_0_and_1_or_1(i64 %x, i32 %y) { 945 %and = and i64 %x, 1 946 %cmp = icmp eq i64 %and, 0 947 %or = or i32 %y, 1 948 %select = select i1 %cmp, i32 %y, i32 %or 949 ret i32 %select 950} 951 952; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_32( 953; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 7 954; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 32 955; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 32 956; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y 957; CHECK-NEXT: ret i32 [[OR]] 958define i32 @select_icmp_ne_0_and_4096_or_32(i32 %x, i32 %y) { 959 %and = and i32 %x, 4096 960 %cmp = icmp ne i32 0, %and 961 %or = or i32 %y, 32 962 %select = select i1 %cmp, i32 %y, i32 %or 963 ret i32 %select 964} 965 966; CHECK-LABEL: @select_icmp_ne_0_and_32_or_4096( 967; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 %x, 7 968; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], 4096 969; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 4096 970; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y 971; CHECK-NEXT: ret i32 [[OR]] 972define i32 @select_icmp_ne_0_and_32_or_4096(i32 %x, i32 %y) { 973 %and = and i32 %x, 32 974 %cmp = icmp ne i32 0, %and 975 %or = or i32 %y, 4096 976 %select = select i1 %cmp, i32 %y, i32 %or 977 ret i32 %select 978} 979 980; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_or_8( 981; CHECK-NEXT: [[LSHR:%.+]] = lshr i32 %x, 27 982; CHECK-NEXT: [[TRUNC:%.+]] = trunc i32 [[LSHR]] to i8 983; CHECK-NEXT: [[AND:%.+]] = and i8 [[TRUNC]], 8 984; CHECK-NEXT: [[XOR:%.+]] = xor i8 [[AND]], 8 985; CHECK-NEXT: [[OR:%.+]] = or i8 [[XOR]], %y 986; CHECK-NEXT: ret i8 [[OR]] 987define i8 @select_icmp_ne_0_and_1073741824_or_8(i32 %x, i8 %y) { 988 %and = and i32 %x, 1073741824 989 %cmp = icmp ne i32 0, %and 990 %or = or i8 %y, 8 991 %select = select i1 %cmp, i8 %y, i8 %or 992 ret i8 %select 993} 994 995; CHECK-LABEL: @select_icmp_ne_0_and_8_or_1073741824( 996; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i8 %x, 8 997; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = zext i8 [[AND]] to i32 998; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl nuw nsw i32 [[ZEXT]], 27 999; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[SHL]], 1073741824 1000; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y 1001; CHECK-NEXT: ret i32 [[OR]] 1002define i32 @select_icmp_ne_0_and_8_or_1073741824(i8 %x, i32 %y) { 1003 %and = and i8 %x, 8 1004 %cmp = icmp ne i8 0, %and 1005 %or = or i32 %y, 1073741824 1006 %select = select i1 %cmp, i32 %y, i32 %or 1007 ret i32 %select 1008} 1009 1010; We can't combine here, because the cmp is scalar and the or vector. 1011; Just make sure we don't assert. 1012define <2 x i32> @select_icmp_eq_and_1_0_or_vector_of_2s(i32 %x, <2 x i32> %y) { 1013 %and = and i32 %x, 1 1014 %cmp = icmp eq i32 %and, 0 1015 %or = or <2 x i32> %y, <i32 2, i32 2> 1016 %select = select i1 %cmp, <2 x i32> %y, <2 x i32> %or 1017 ret <2 x i32> %select 1018} 1019 1020; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8( 1021; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9 1022; CHECK-NEXT: ret i32 [[AND]] 1023define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) { 1024 %and = and i32 %x, 8 1025 %cmp = icmp eq i32 %and, 0 1026 %xor = xor i32 %x, 8 1027 %x.xor = select i1 %cmp, i32 %x, i32 %xor 1028 ret i32 %x.xor 1029} 1030 1031; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8( 1032; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8 1033; CHECK-NEXT: ret i32 [[OR]] 1034define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) { 1035 %and = and i32 %x, 8 1036 %cmp = icmp eq i32 %and, 0 1037 %xor = xor i32 %x, 8 1038 %xor.x = select i1 %cmp, i32 %xor, i32 %x 1039 ret i32 %xor.x 1040} 1041 1042; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8( 1043; CHECK: select i1 %cmp, i64 %y, i64 %xor 1044define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) { 1045 %and = and i32 %x, 8 1046 %cmp = icmp eq i32 %and, 0 1047 %xor = xor i64 %y, 8 1048 %y.xor = select i1 %cmp, i64 %y, i64 %xor 1049 ret i64 %y.xor 1050} 1051 1052; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8( 1053; CHECK: select i1 %cmp, i64 %xor, i64 %y 1054define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) { 1055 %and = and i32 %x, 8 1056 %cmp = icmp eq i32 %and, 0 1057 %xor = xor i64 %y, 8 1058 %xor.y = select i1 %cmp, i64 %xor, i64 %y 1059 ret i64 %xor.y 1060} 1061 1062; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8( 1063; CHECK: xor i64 %1, 8 1064; CHECK: or i64 %2, %y 1065define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) { 1066 %and = and i32 %x, 8 1067 %cmp = icmp eq i32 %and, 0 1068 %or = or i64 %y, 8 1069 %or.y = select i1 %cmp, i64 %or, i64 %y 1070 ret i64 %or.y 1071} 1072 1073; CHECK-LABEL: @select_icmp_and_2147483648_ne_0_xor_2147483648( 1074; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 2147483647 1075; CHECK-NEXT: ret i32 [[AND]] 1076define i32 @select_icmp_and_2147483648_ne_0_xor_2147483648(i32 %x) { 1077 %and = and i32 %x, 2147483648 1078 %cmp = icmp eq i32 %and, 0 1079 %xor = xor i32 %x, 2147483648 1080 %x.xor = select i1 %cmp, i32 %x, i32 %xor 1081 ret i32 %x.xor 1082} 1083 1084; CHECK-LABEL: @select_icmp_and_2147483648_eq_0_xor_2147483648( 1085; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, -2147483648 1086; CHECK-NEXT: ret i32 [[OR]] 1087define i32 @select_icmp_and_2147483648_eq_0_xor_2147483648(i32 %x) { 1088 %and = and i32 %x, 2147483648 1089 %cmp = icmp eq i32 %and, 0 1090 %xor = xor i32 %x, 2147483648 1091 %xor.x = select i1 %cmp, i32 %xor, i32 %x 1092 ret i32 %xor.x 1093} 1094 1095; CHECK-LABEL: @select_icmp_x_and_2147483648_ne_0_or_2147483648( 1096; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, -2147483648 1097; CHECK-NEXT: ret i32 [[OR]] 1098define i32 @select_icmp_x_and_2147483648_ne_0_or_2147483648(i32 %x) { 1099 %and = and i32 %x, 2147483648 1100 %cmp = icmp eq i32 %and, 0 1101 %or = or i32 %x, 2147483648 1102 %or.x = select i1 %cmp, i32 %or, i32 %x 1103 ret i32 %or.x 1104} 1105 1106define i32 @test65(i64 %x) { 1107 %1 = and i64 %x, 16 1108 %2 = icmp ne i64 %1, 0 1109 %3 = select i1 %2, i32 40, i32 42 1110 ret i32 %3 1111 1112; CHECK-LABEL: @test65( 1113; CHECK: %[[TRUNC:.*]] = trunc i64 %x to i32 1114; CHECK: %[[LSHR:.*]] = lshr i32 %[[TRUNC]], 3 1115; CHECK: %[[AND:.*]] = and i32 %[[LSHR]], 2 1116; CHECK: %[[XOR:.*]] = xor i32 %[[AND]], 42 1117; CHECK: ret i32 %[[XOR]] 1118} 1119 1120define i32 @test66(i64 %x) { 1121 %1 = and i64 %x, 4294967296 1122 %2 = icmp ne i64 %1, 0 1123 %3 = select i1 %2, i32 40, i32 42 1124 ret i32 %3 1125 1126; CHECK-LABEL: @test66( 1127; CHECK: select 1128} 1129 1130define i32 @test67(i16 %x) { 1131 %1 = and i16 %x, 4 1132 %2 = icmp ne i16 %1, 0 1133 %3 = select i1 %2, i32 40, i32 42 1134 ret i32 %3 1135 1136; CHECK-LABEL: @test67( 1137; CHECK: and i16 %x, 4 1138; CHECK: zext i16 %1 to i32 1139; CHECK: lshr exact i32 %2, 1 1140; CHECK: xor i32 %3, 42 1141} 1142 1143; SMIN(SMIN(X, 11), 92) -> SMIN(X, 11) 1144define i32 @test68(i32 %x) { 1145entry: 1146 %cmp = icmp slt i32 11, %x 1147 %cond = select i1 %cmp, i32 11, i32 %x 1148 %cmp3 = icmp slt i32 92, %cond 1149 %retval = select i1 %cmp3, i32 92, i32 %cond 1150 ret i32 %retval 1151; CHECK-LABEL: @test68( 1152; CHECK: ret i32 %cond 1153} 1154 1155; MIN(MIN(X, 24), 83) -> MIN(X, 24) 1156define i32 @test69(i32 %x) { 1157entry: 1158 %cmp = icmp ult i32 24, %x 1159 %cond = select i1 %cmp, i32 24, i32 %x 1160 %cmp3 = icmp ult i32 83, %cond 1161 %retval = select i1 %cmp3, i32 83, i32 %cond 1162 ret i32 %retval 1163; CHECK-LABEL: @test69( 1164; CHECK: ret i32 %cond 1165} 1166 1167; SMAX(SMAX(X, 75), 36) -> SMAX(X, 75) 1168define i32 @test70(i32 %x) { 1169entry: 1170 %cmp = icmp slt i32 %x, 75 1171 %cond = select i1 %cmp, i32 75, i32 %x 1172 %cmp3 = icmp slt i32 %cond, 36 1173 %retval = select i1 %cmp3, i32 36, i32 %cond 1174 ret i32 %retval 1175; CHECK-LABEL: @test70( 1176; CHECK: ret i32 %cond 1177} 1178 1179; MAX(MAX(X, 68), 47) -> MAX(X, 68) 1180define i32 @test71(i32 %x) { 1181entry: 1182 %cmp = icmp ult i32 %x, 68 1183 %cond = select i1 %cmp, i32 68, i32 %x 1184 %cmp3 = icmp ult i32 %cond, 47 1185 %retval = select i1 %cmp3, i32 47, i32 %cond 1186 ret i32 %retval 1187; CHECK-LABEL: @test71( 1188; CHECK: ret i32 %cond 1189} 1190 1191; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11) 1192define i32 @test72(i32 %x) { 1193 %cmp = icmp sgt i32 %x, 92 1194 %cond = select i1 %cmp, i32 92, i32 %x 1195 %cmp3 = icmp sgt i32 %cond, 11 1196 %retval = select i1 %cmp3, i32 11, i32 %cond 1197 ret i32 %retval 1198; CHECK-LABEL: @test72( 1199; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 11 1200; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 11, i32 %x 1201; CHECK-NEXT: ret i32 [[SEL]] 1202} 1203 1204; MIN(MIN(X, 83), 24) -> MIN(X, 24) 1205define i32 @test73(i32 %x) { 1206 %cmp = icmp ugt i32 %x, 83 1207 %cond = select i1 %cmp, i32 83, i32 %x 1208 %cmp3 = icmp ugt i32 %cond, 24 1209 %retval = select i1 %cmp3, i32 24, i32 %cond 1210 ret i32 %retval 1211; CHECK-LABEL: @test73( 1212; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ugt i32 %x, 24 1213; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 24, i32 %x 1214; CHECK-NEXT: ret i32 [[SEL]] 1215} 1216 1217; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75) 1218define i32 @test74(i32 %x) { 1219 %cmp = icmp slt i32 %x, 36 1220 %cond = select i1 %cmp, i32 36, i32 %x 1221 %cmp3 = icmp slt i32 %cond, 75 1222 %retval = select i1 %cmp3, i32 75, i32 %cond 1223 ret i32 %retval 1224; CHECK-LABEL: @test74( 1225; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 75 1226; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 75, i32 %x 1227; CHECK-NEXT: ret i32 [[SEL]] 1228} 1229 1230; MAX(MAX(X, 47), 68) -> MAX(X, 68) 1231define i32 @test75(i32 %x) { 1232 %cmp = icmp ult i32 %x, 47 1233 %cond = select i1 %cmp, i32 47, i32 %x 1234 %cmp3 = icmp ult i32 %cond, 68 1235 %retval = select i1 %cmp3, i32 68, i32 %cond 1236 ret i32 %retval 1237; CHECK-LABEL: @test75( 1238; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %x, 68 1239; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 68, i32 %x 1240; CHECK-NEXT: ret i32 [[SEL]] 1241} 1242 1243@under_aligned = external global i32, align 1 1244 1245define i32 @test76(i1 %flag, i32* %x) { 1246; The load here must not be speculated around the select. One side of the 1247; select is trivially dereferencable but may have a lower alignment than the 1248; load does. 1249; CHECK-LABEL: @test76( 1250; CHECK: store i32 0, i32* %x 1251; CHECK: %[[P:.*]] = select i1 %flag, i32* @under_aligned, i32* %x 1252; CHECK: load i32, i32* %[[P]] 1253 1254 store i32 0, i32* %x 1255 %p = select i1 %flag, i32* @under_aligned, i32* %x 1256 %v = load i32, i32* %p 1257 ret i32 %v 1258} 1259 1260declare void @scribble_on_i32(i32*) 1261 1262define i32 @test77(i1 %flag, i32* %x) { 1263; The load here must not be speculated around the select. One side of the 1264; select is trivially dereferencable but may have a lower alignment than the 1265; load does. 1266; CHECK-LABEL: @test77( 1267; CHECK: %[[A:.*]] = alloca i32, align 1 1268; CHECK: call void @scribble_on_i32(i32* %[[A]]) 1269; CHECK: store i32 0, i32* %x 1270; CHECK: %[[P:.*]] = select i1 %flag, i32* %[[A]], i32* %x 1271; CHECK: load i32, i32* %[[P]] 1272 1273 %under_aligned = alloca i32, align 1 1274 call void @scribble_on_i32(i32* %under_aligned) 1275 store i32 0, i32* %x 1276 %p = select i1 %flag, i32* %under_aligned, i32* %x 1277 %v = load i32, i32* %p 1278 ret i32 %v 1279} 1280 1281define i32 @test78(i1 %flag, i32* %x, i32* %y, i32* %z) { 1282; Test that we can speculate the loads around the select even when we can't 1283; fold the load completely away. 1284; CHECK-LABEL: @test78( 1285; CHECK: %[[V1:.*]] = load i32, i32* %x 1286; CHECK-NEXT: %[[V2:.*]] = load i32, i32* %y 1287; CHECK-NEXT: %[[S:.*]] = select i1 %flag, i32 %[[V1]], i32 %[[V2]] 1288; CHECK-NEXT: ret i32 %[[S]] 1289entry: 1290 store i32 0, i32* %x 1291 store i32 0, i32* %y 1292 ; Block forwarding by storing to %z which could alias either %x or %y. 1293 store i32 42, i32* %z 1294 %p = select i1 %flag, i32* %x, i32* %y 1295 %v = load i32, i32* %p 1296 ret i32 %v 1297} 1298 1299define float @test79(i1 %flag, float* %x, i32* %y, i32* %z) { 1300; Test that we can speculate the loads around the select even when we can't 1301; fold the load completely away. 1302; CHECK-LABEL: @test79( 1303; CHECK: %[[V1:.*]] = load float, float* %x 1304; CHECK-NEXT: %[[V2:.*]] = load float, float* %y 1305; CHECK-NEXT: %[[S:.*]] = select i1 %flag, float %[[V1]], float %[[V2]] 1306; CHECK-NEXT: ret float %[[S]] 1307entry: 1308 %x1 = bitcast float* %x to i32* 1309 %y1 = bitcast i32* %y to float* 1310 store i32 0, i32* %x1 1311 store i32 0, i32* %y 1312 ; Block forwarding by storing to %z which could alias either %x or %y. 1313 store i32 42, i32* %z 1314 %p = select i1 %flag, float* %x, float* %y1 1315 %v = load float, float* %p 1316 ret float %v 1317} 1318 1319define i32 @test80(i1 %flag) { 1320; Test that when we speculate the loads around the select they fold throug 1321; load->load folding and load->store folding. 1322; CHECK-LABEL: @test80( 1323; CHECK: %[[X:.*]] = alloca i32 1324; CHECK-NEXT: %[[Y:.*]] = alloca i32 1325; CHECK: %[[V:.*]] = load i32, i32* %[[X]] 1326; CHECK-NEXT: store i32 %[[V]], i32* %[[Y]] 1327; CHECK-NEXT: ret i32 %[[V]] 1328entry: 1329 %x = alloca i32 1330 %y = alloca i32 1331 call void @scribble_on_i32(i32* %x) 1332 call void @scribble_on_i32(i32* %y) 1333 %tmp = load i32, i32* %x 1334 store i32 %tmp, i32* %y 1335 %p = select i1 %flag, i32* %x, i32* %y 1336 %v = load i32, i32* %p 1337 ret i32 %v 1338} 1339 1340define float @test81(i1 %flag) { 1341; Test that we can speculate the load around the select even though they use 1342; differently typed pointers. 1343; CHECK-LABEL: @test81( 1344; CHECK: %[[X:.*]] = alloca i32 1345; CHECK-NEXT: %[[Y:.*]] = alloca i32 1346; CHECK: %[[V:.*]] = load i32, i32* %[[X]] 1347; CHECK-NEXT: store i32 %[[V]], i32* %[[Y]] 1348; CHECK-NEXT: %[[C:.*]] = bitcast i32 %[[V]] to float 1349; CHECK-NEXT: ret float %[[C]] 1350entry: 1351 %x = alloca float 1352 %y = alloca i32 1353 %x1 = bitcast float* %x to i32* 1354 %y1 = bitcast i32* %y to float* 1355 call void @scribble_on_i32(i32* %x1) 1356 call void @scribble_on_i32(i32* %y) 1357 %tmp = load i32, i32* %x1 1358 store i32 %tmp, i32* %y 1359 %p = select i1 %flag, float* %x, float* %y1 1360 %v = load float, float* %p 1361 ret float %v 1362} 1363 1364define i32 @test82(i1 %flag) { 1365; Test that we can speculate the load around the select even though they use 1366; differently typed pointers. 1367; CHECK-LABEL: @test82( 1368; CHECK: %[[X:.*]] = alloca float 1369; CHECK-NEXT: %[[Y:.*]] = alloca i32 1370; CHECK-NEXT: %[[X1:.*]] = bitcast float* %[[X]] to i32* 1371; CHECK-NEXT: %[[Y1:.*]] = bitcast i32* %[[Y]] to float* 1372; CHECK: %[[V:.*]] = load float, float* %[[X]] 1373; CHECK-NEXT: store float %[[V]], float* %[[Y1]] 1374; CHECK-NEXT: %[[C:.*]] = bitcast float %[[V]] to i32 1375; CHECK-NEXT: ret i32 %[[C]] 1376entry: 1377 %x = alloca float 1378 %y = alloca i32 1379 %x1 = bitcast float* %x to i32* 1380 %y1 = bitcast i32* %y to float* 1381 call void @scribble_on_i32(i32* %x1) 1382 call void @scribble_on_i32(i32* %y) 1383 %tmp = load float, float* %x 1384 store float %tmp, float* %y1 1385 %p = select i1 %flag, i32* %x1, i32* %y 1386 %v = load i32, i32* %p 1387 ret i32 %v 1388} 1389 1390declare void @scribble_on_i64(i64*) 1391declare void @scribble_on_i128(i128*) 1392 1393define i8* @test83(i1 %flag) { 1394; Test that we can speculate the load around the select even though they use 1395; differently typed pointers and requires inttoptr casts. 1396; CHECK-LABEL: @test83( 1397; CHECK: %[[X:.*]] = alloca i8* 1398; CHECK-NEXT: %[[Y:.*]] = alloca i8* 1399; CHECK-DAG: %[[X2:.*]] = bitcast i8** %[[X]] to i64* 1400; CHECK-DAG: %[[Y2:.*]] = bitcast i8** %[[Y]] to i64* 1401; CHECK: %[[V:.*]] = load i64, i64* %[[X2]] 1402; CHECK-NEXT: store i64 %[[V]], i64* %[[Y2]] 1403; CHECK-NEXT: %[[C:.*]] = inttoptr i64 %[[V]] to i8* 1404; CHECK-NEXT: ret i8* %[[S]] 1405entry: 1406 %x = alloca i8* 1407 %y = alloca i64 1408 %x1 = bitcast i8** %x to i64* 1409 %y1 = bitcast i64* %y to i8** 1410 call void @scribble_on_i64(i64* %x1) 1411 call void @scribble_on_i64(i64* %y) 1412 %tmp = load i64, i64* %x1 1413 store i64 %tmp, i64* %y 1414 %p = select i1 %flag, i8** %x, i8** %y1 1415 %v = load i8*, i8** %p 1416 ret i8* %v 1417} 1418 1419define i64 @test84(i1 %flag) { 1420; Test that we can speculate the load around the select even though they use 1421; differently typed pointers and requires a ptrtoint cast. 1422; CHECK-LABEL: @test84( 1423; CHECK: %[[X:.*]] = alloca i8* 1424; CHECK-NEXT: %[[Y:.*]] = alloca i8* 1425; CHECK: %[[V:.*]] = load i8*, i8** %[[X]] 1426; CHECK-NEXT: store i8* %[[V]], i8** %[[Y]] 1427; CHECK-NEXT: %[[C:.*]] = ptrtoint i8* %[[V]] to i64 1428; CHECK-NEXT: ret i64 %[[C]] 1429entry: 1430 %x = alloca i8* 1431 %y = alloca i64 1432 %x1 = bitcast i8** %x to i64* 1433 %y1 = bitcast i64* %y to i8** 1434 call void @scribble_on_i64(i64* %x1) 1435 call void @scribble_on_i64(i64* %y) 1436 %tmp = load i8*, i8** %x 1437 store i8* %tmp, i8** %y1 1438 %p = select i1 %flag, i64* %x1, i64* %y 1439 %v = load i64, i64* %p 1440 ret i64 %v 1441} 1442 1443define i8* @test85(i1 %flag) { 1444; Test that we can't speculate the load around the select. The load of the 1445; pointer doesn't load all of the stored integer bits. We could fix this, but it 1446; would require endianness checks and other nastiness. 1447; CHECK-LABEL: @test85( 1448; CHECK: %[[T:.*]] = load i128, i128* 1449; CHECK-NEXT: store i128 %[[T]], i128* 1450; CHECK-NEXT: %[[X:.*]] = load i8*, i8** 1451; CHECK-NEXT: %[[Y:.*]] = load i8*, i8** 1452; CHECK-NEXT: %[[V:.*]] = select i1 %flag, i8* %[[X]], i8* %[[Y]] 1453; CHECK-NEXT: ret i8* %[[V]] 1454entry: 1455 %x = alloca [2 x i8*] 1456 %y = alloca i128 1457 %x1 = bitcast [2 x i8*]* %x to i8** 1458 %x2 = bitcast i8** %x1 to i128* 1459 %y1 = bitcast i128* %y to i8** 1460 call void @scribble_on_i128(i128* %x2) 1461 call void @scribble_on_i128(i128* %y) 1462 %tmp = load i128, i128* %x2 1463 store i128 %tmp, i128* %y 1464 %p = select i1 %flag, i8** %x1, i8** %y1 1465 %v = load i8*, i8** %p 1466 ret i8* %v 1467} 1468 1469define i128 @test86(i1 %flag) { 1470; Test that we can't speculate the load around the select when the integer size 1471; is larger than the pointer size. The store of the pointer doesn't store to all 1472; the bits of the integer. 1473; 1474; CHECK-LABEL: @test86( 1475; CHECK: %[[T:.*]] = load i8*, i8** 1476; CHECK-NEXT: store i8* %[[T]], i8** 1477; CHECK-NEXT: %[[X:.*]] = load i128, i128* 1478; CHECK-NEXT: %[[Y:.*]] = load i128, i128* 1479; CHECK-NEXT: %[[V:.*]] = select i1 %flag, i128 %[[X]], i128 %[[Y]] 1480; CHECK-NEXT: ret i128 %[[V]] 1481entry: 1482 %x = alloca [2 x i8*] 1483 %y = alloca i128 1484 %x1 = bitcast [2 x i8*]* %x to i8** 1485 %x2 = bitcast i8** %x1 to i128* 1486 %y1 = bitcast i128* %y to i8** 1487 call void @scribble_on_i128(i128* %x2) 1488 call void @scribble_on_i128(i128* %y) 1489 %tmp = load i8*, i8** %x1 1490 store i8* %tmp, i8** %y1 1491 %p = select i1 %flag, i128* %x2, i128* %y 1492 %v = load i128, i128* %p 1493 ret i128 %v 1494} 1495 1496define i32 @test_select_select0(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { 1497 ; CHECK-LABEL: @test_select_select0( 1498 ; CHECK: %[[C0:.*]] = icmp sge i32 %a, %v1 1499 ; CHECK-NEXT: %[[C1:.*]] = icmp slt i32 %a, %v2 1500 ; CHECK-NEXT: %[[C:.*]] = and i1 %[[C1]], %[[C0]] 1501 ; CHECK-NEXT: %[[SEL:.*]] = select i1 %[[C]], i32 %r0, i32 %r1 1502 ; CHECK-NEXT: ret i32 %[[SEL]] 1503 %c0 = icmp sge i32 %a, %v1 1504 %s0 = select i1 %c0, i32 %r0, i32 %r1 1505 %c1 = icmp slt i32 %a, %v2 1506 %s1 = select i1 %c1, i32 %s0, i32 %r1 1507 ret i32 %s1 1508} 1509 1510define i32 @test_select_select1(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { 1511 ; CHECK-LABEL: @test_select_select1( 1512 ; CHECK: %[[C0:.*]] = icmp sge i32 %a, %v1 1513 ; CHECK-NEXT: %[[C1:.*]] = icmp slt i32 %a, %v2 1514 ; CHECK-NEXT: %[[C:.*]] = or i1 %[[C1]], %[[C0]] 1515 ; CHECK-NEXT: %[[SEL:.*]] = select i1 %[[C]], i32 %r0, i32 %r1 1516 ; CHECK-NEXT: ret i32 %[[SEL]] 1517 %c0 = icmp sge i32 %a, %v1 1518 %s0 = select i1 %c0, i32 %r0, i32 %r1 1519 %c1 = icmp slt i32 %a, %v2 1520 %s1 = select i1 %c1, i32 %r0, i32 %s0 1521 ret i32 %s1 1522} 1523