1; RUN: opt < %s -S -loop-unroll -mtriple aarch64 -mcpu=cortex-a57 | FileCheck %s
2
3; Partial unroll 8 times for this loop.
4define void @unroll1() nounwind {
5entry:
6  br label %loop
7
8loop:
9  %iv = phi i32 [ 0, %entry ], [ %inc, %loop ]
10  %inc = add i32 %iv, 1
11  %exitcnd = icmp uge i32 %inc, 1024
12  br i1 %exitcnd, label %exit, label %loop
13
14exit:
15  ret void
16}
17
18; CHECK:      add
19; CHECK-NEXT: add
20; CHECK-NEXT: add
21; CHECK-NEXT: add
22; CHECK-NEXT: add
23; CHECK-NEXT: add
24; CHECK-NEXT: add
25; CHECK-NEXT: add
26; CHECK-NEXT: icmp
27
28; Partial unroll 16 times for this loop.
29define void @unroll2() nounwind {
30entry:
31  br label %loop1
32
33loop1:
34  %iv1 = phi i32 [ 0, %entry ], [ %inc1, %loop1.latch ]
35  br label %loop2.header
36
37loop2.header:
38  br label %loop2
39
40loop2:
41  %iv2 = phi i32 [ 0, %loop2.header ], [ %inc2, %loop2 ]
42  %inc2 = add i32 %iv2, 1
43  %exitcnd2 = icmp uge i32 %inc2, 1024
44  br i1 %exitcnd2, label %exit2, label %loop2
45
46exit2:
47  br label %loop1.latch
48
49loop1.latch:
50  %inc1 = add i32 %iv1, 1
51  %exitcnd1 = icmp uge i32 %inc1, 1024
52  br i1 %exitcnd2, label %exit, label %loop1
53
54exit:
55  ret void
56}
57
58
59
60; CHECK:      add
61; CHECK-NEXT: add
62; CHECK-NEXT: add
63; CHECK-NEXT: add
64; CHECK-NEXT: add
65; CHECK-NEXT: add
66; CHECK-NEXT: add
67; CHECK-NEXT: add
68; CHECK-NEXT: add
69; CHECK-NEXT: add
70; CHECK-NEXT: add
71; CHECK-NEXT: add
72; CHECK-NEXT: add
73; CHECK-NEXT: add
74; CHECK-NEXT: add
75; CHECK-NEXT: add
76; CHECK-NEXT: icmp
77