Lines Matching refs:SDValue
57 bool FoldOperand(SDValue &Src, SDValue &Sel, SDValue &Neg, SDValue &Abs,
59 bool FoldOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
60 bool FoldDotOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
63 bool SelectADDRParam(SDValue Addr, SDValue& R1, SDValue& R2);
64 bool SelectADDR(SDValue N, SDValue &R1, SDValue &R2);
65 bool SelectADDR64(SDValue N, SDValue &R1, SDValue &R2);
88 bool SelectGlobalValueConstantOffset(SDValue Addr, SDValue& IntPtr);
89 bool SelectGlobalValueVariableOffset(SDValue Addr, SDValue &BaseReg,
90 SDValue& Offset);
91 bool SelectADDRVTX_READ(SDValue Addr, SDValue &Base, SDValue &Offset);
92 bool SelectADDRIndirect(SDValue Addr, SDValue &Base, SDValue &Offset);
93 bool isDSOffsetLegal(const SDValue &Base, unsigned Offset,
95 bool SelectDS1Addr1Offset(SDValue Ptr, SDValue &Base, SDValue &Offset) const;
96 bool SelectDS64Bit4ByteAligned(SDValue Ptr, SDValue &Base, SDValue &Offset0,
97 SDValue &Offset1) const;
98 void SelectMUBUF(SDValue Addr, SDValue &SRsrc, SDValue &VAddr,
99 SDValue &SOffset, SDValue &Offset, SDValue &Offen,
100 SDValue &Idxen, SDValue &Addr64, SDValue &GLC, SDValue &SLC,
101 SDValue &TFE) const;
102 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, SDValue &VAddr,
103 SDValue &SOffset, SDValue &Offset, SDValue &GLC,
104 SDValue &SLC, SDValue &TFE) const;
105 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc,
106 SDValue &VAddr, SDValue &SOffset, SDValue &Offset,
107 SDValue &SLC) const;
108 bool SelectMUBUFScratch(SDValue Addr, SDValue &RSrc, SDValue &VAddr,
109 SDValue &SOffset, SDValue &ImmOffset) const;
110 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &SOffset,
111 SDValue &Offset, SDValue &GLC, SDValue &SLC,
112 SDValue &TFE) const;
113 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset,
114 SDValue &Offset, SDValue &GLC) const;
115 bool SelectSMRDOffset(SDValue ByteOffsetNode, SDValue &Offset,
117 bool SelectSMRD(SDValue Addr, SDValue &SBase, SDValue &Offset,
119 bool SelectSMRDImm(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
120 bool SelectSMRDImm32(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
121 bool SelectSMRDSgpr(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
122 bool SelectSMRDBufferImm(SDValue Addr, SDValue &Offset) const;
123 bool SelectSMRDBufferImm32(SDValue Addr, SDValue &Offset) const;
124 bool SelectSMRDBufferSgpr(SDValue Addr, SDValue &Offset) const;
126 bool SelectVOP3Mods(SDValue In, SDValue &Src, SDValue &SrcMods) const;
127 bool SelectVOP3NoMods(SDValue In, SDValue &Src, SDValue &SrcMods) const;
128 bool SelectVOP3Mods0(SDValue In, SDValue &Src, SDValue &SrcMods,
129 SDValue &Clamp, SDValue &Omod) const;
130 bool SelectVOP3NoMods0(SDValue In, SDValue &Src, SDValue &SrcMods,
131 SDValue &Clamp, SDValue &Omod) const;
133 bool SelectVOP3Mods0Clamp(SDValue In, SDValue &Src, SDValue &SrcMods,
134 SDValue &Omod) const;
135 bool SelectVOP3Mods0Clamp0OMod(SDValue In, SDValue &Src, SDValue &SrcMods,
136 SDValue &Clamp,
137 SDValue &Omod) const;
142 SDNode *getS_BFE(unsigned Opcode, SDLoc DL, SDValue Val,
202 SDValue SubRegOp = N->getOperand(OpNo + 1); in getOperandRegClass()
211 SDValue Addr, SDValue& R1, SDValue& R2) { in SelectADDRParam()
231 bool AMDGPUDAGToDAGISel::SelectADDR(SDValue Addr, SDValue& R1, SDValue& R2) { in SelectADDR()
240 bool AMDGPUDAGToDAGISel::SelectADDR64(SDValue Addr, SDValue& R1, SDValue& R2) { in SelectADDR64()
275 SDValue M0 = Lowering.copyToM0(*CurDAG, CurDAG->getEntryNode(), SDLoc(N), in glueCopyToM0()
278 SDValue Glue = M0.getValue(1); in glueCopyToM0()
280 SmallVector <SDValue, 8> Ops; in glueCopyToM0()
359 SDValue RegClass = CurDAG->getTargetConstant(RegClassID, DL, MVT::i32); in Select()
371 SmallVector<SDValue, 16 * 2 + 1> RegSeqArgs(NumVectorElts * 2 + 1); in Select()
395 RegSeqArgs[1 + (2 * i)] = SDValue(ImpDef, 0); in Select()
407 SDValue RC, SubReg0, SubReg1; in Select()
423 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0, in Select()
449 const SDValue Ops[] = { in Select()
451 SDValue(Lo, 0), CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32), in Select()
452 SDValue(Hi, 0), CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32) in Select()
639 bool AMDGPUDAGToDAGISel::SelectGlobalValueConstantOffset(SDValue Addr, in SelectGlobalValueConstantOffset()
640 SDValue& IntPtr) { in SelectGlobalValueConstantOffset()
649 bool AMDGPUDAGToDAGISel::SelectGlobalValueVariableOffset(SDValue Addr, in SelectGlobalValueVariableOffset()
650 SDValue& BaseReg, SDValue &Offset) { in SelectGlobalValueVariableOffset()
659 bool AMDGPUDAGToDAGISel::SelectADDRVTX_READ(SDValue Addr, SDValue &Base, in SelectADDRVTX_READ()
660 SDValue &Offset) { in SelectADDRVTX_READ()
688 bool AMDGPUDAGToDAGISel::SelectADDRIndirect(SDValue Addr, SDValue &Base, in SelectADDRIndirect()
689 SDValue &Offset) { in SelectADDRIndirect()
710 SDValue LHS = N->getOperand(0); in SelectADD_SUB_I64()
711 SDValue RHS = N->getOperand(1); in SelectADD_SUB_I64()
715 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32); in SelectADD_SUB_I64()
716 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32); in SelectADD_SUB_I64()
729 SDValue AddLoArgs[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) }; in SelectADD_SUB_I64()
736 SDValue Carry(AddLo, 1); in SelectADD_SUB_I64()
739 SDValue(Hi0, 0), SDValue(Hi1, 0), Carry); in SelectADD_SUB_I64()
741 SDValue Args[5] = { in SelectADD_SUB_I64()
743 SDValue(AddLo,0), in SelectADD_SUB_I64()
745 SDValue(AddHi,0), in SelectADD_SUB_I64()
764 SDValue Ops[8]; in SelectDIV_SCALE()
772 bool AMDGPUDAGToDAGISel::isDSOffsetLegal(const SDValue &Base, unsigned Offset, in isDSOffsetLegal()
787 bool AMDGPUDAGToDAGISel::SelectDS1Addr1Offset(SDValue Addr, SDValue &Base, in SelectDS1Addr1Offset()
788 SDValue &Offset) const { in SelectDS1Addr1Offset()
790 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset()
791 SDValue N1 = Addr.getOperand(1); in SelectDS1Addr1Offset()
805 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS1Addr1Offset()
810 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32, in SelectDS1Addr1Offset()
818 Base = SDValue(MachineSub, 0); in SelectDS1Addr1Offset()
833 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS1Addr1Offset()
836 Base = SDValue(MovZero, 0); in SelectDS1Addr1Offset()
849 bool AMDGPUDAGToDAGISel::SelectDS64Bit4ByteAligned(SDValue Addr, SDValue &Base, in SelectDS64Bit4ByteAligned()
850 SDValue &Offset0, in SelectDS64Bit4ByteAligned()
851 SDValue &Offset1) const { in SelectDS64Bit4ByteAligned()
855 SDValue N0 = Addr.getOperand(0); in SelectDS64Bit4ByteAligned()
856 SDValue N1 = Addr.getOperand(1); in SelectDS64Bit4ByteAligned()
875 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS64Bit4ByteAligned()
880 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32, in SelectDS64Bit4ByteAligned()
888 Base = SDValue(MachineSub, 0); in SelectDS64Bit4ByteAligned()
901 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS64Bit4ByteAligned()
905 Base = SDValue(MovZero, 0); in SelectDS64Bit4ByteAligned()
923 void AMDGPUDAGToDAGISel::SelectMUBUF(SDValue Addr, SDValue &Ptr, in SelectMUBUF()
924 SDValue &VAddr, SDValue &SOffset, in SelectMUBUF()
925 SDValue &Offset, SDValue &Offen, in SelectMUBUF()
926 SDValue &Idxen, SDValue &Addr64, in SelectMUBUF()
927 SDValue &GLC, SDValue &SLC, in SelectMUBUF()
928 SDValue &TFE) const { in SelectMUBUF()
941 SDValue N0 = Addr.getOperand(0); in SelectMUBUF()
942 SDValue N1 = Addr.getOperand(1); in SelectMUBUF()
947 SDValue N2 = N0.getOperand(0); in SelectMUBUF()
948 SDValue N3 = N0.getOperand(1); in SelectMUBUF()
965 SOffset = SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, DL, MVT::i32, in SelectMUBUF()
974 SDValue N0 = Addr.getOperand(0); in SelectMUBUF()
975 SDValue N1 = Addr.getOperand(1); in SelectMUBUF()
989 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, in SelectMUBUFAddr64()
990 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
991 SDValue &Offset, SDValue &GLC, in SelectMUBUFAddr64()
992 SDValue &SLC, SDValue &TFE) const { in SelectMUBUFAddr64()
993 SDValue Ptr, Offen, Idxen, Addr64; in SelectMUBUFAddr64()
1009 SRsrc = SDValue(Lowering.wrapAddr64Rsrc(*CurDAG, DL, Ptr), 0); in SelectMUBUFAddr64()
1016 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, in SelectMUBUFAddr64()
1017 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
1018 SDValue &Offset, in SelectMUBUFAddr64()
1019 SDValue &SLC) const { in SelectMUBUFAddr64()
1021 SDValue GLC, TFE; in SelectMUBUFAddr64()
1026 bool AMDGPUDAGToDAGISel::SelectMUBUFScratch(SDValue Addr, SDValue &Rsrc, in SelectMUBUFScratch()
1027 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFScratch()
1028 SDValue &ImmOffset) const { in SelectMUBUFScratch()
1039 SDValue N0 = Addr.getOperand(0); in SelectMUBUFScratch()
1040 SDValue N1 = Addr.getOperand(1); in SelectMUBUFScratch()
1058 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset()
1059 SDValue &SOffset, SDValue &Offset, in SelectMUBUFOffset()
1060 SDValue &GLC, SDValue &SLC, in SelectMUBUFOffset()
1061 SDValue &TFE) const { in SelectMUBUFOffset()
1062 SDValue Ptr, VAddr, Offen, Idxen, Addr64; in SelectMUBUFOffset()
1079 SRsrc = SDValue(Lowering.buildRSRC(*CurDAG, DL, Ptr, 0, Rsrc), 0); in SelectMUBUFOffset()
1085 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset()
1086 SDValue &Soffset, SDValue &Offset, in SelectMUBUFOffset()
1087 SDValue &GLC) const { in SelectMUBUFOffset()
1088 SDValue SLC, TFE; in SelectMUBUFOffset()
1103 bool AMDGPUDAGToDAGISel::SelectSMRDOffset(SDValue ByteOffsetNode, in SelectSMRDOffset()
1104 SDValue &Offset, bool &Imm) const { in SelectSMRDOffset()
1130 SDValue C32Bit = CurDAG->getTargetConstant(ByteOffset, SL, MVT::i32); in SelectSMRDOffset()
1131 Offset = SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, in SelectSMRDOffset()
1138 bool AMDGPUDAGToDAGISel::SelectSMRD(SDValue Addr, SDValue &SBase, in SelectSMRD()
1139 SDValue &Offset, bool &Imm) const { in SelectSMRD()
1143 SDValue N0 = Addr.getOperand(0); in SelectSMRD()
1144 SDValue N1 = Addr.getOperand(1); in SelectSMRD()
1157 bool AMDGPUDAGToDAGISel::SelectSMRDImm(SDValue Addr, SDValue &SBase, in SelectSMRDImm()
1158 SDValue &Offset) const { in SelectSMRDImm()
1163 bool AMDGPUDAGToDAGISel::SelectSMRDImm32(SDValue Addr, SDValue &SBase, in SelectSMRDImm32()
1164 SDValue &Offset) const { in SelectSMRDImm32()
1176 bool AMDGPUDAGToDAGISel::SelectSMRDSgpr(SDValue Addr, SDValue &SBase, in SelectSMRDSgpr()
1177 SDValue &Offset) const { in SelectSMRDSgpr()
1183 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm(SDValue Addr, in SelectSMRDBufferImm()
1184 SDValue &Offset) const { in SelectSMRDBufferImm()
1189 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm32(SDValue Addr, in SelectSMRDBufferImm32()
1190 SDValue &Offset) const { in SelectSMRDBufferImm32()
1201 bool AMDGPUDAGToDAGISel::SelectSMRDBufferSgpr(SDValue Addr, in SelectSMRDBufferSgpr()
1202 SDValue &Offset) const { in SelectSMRDBufferSgpr()
1229 SDValue Src = ASC->getOperand(0); in SelectAddrSpaceCast()
1251 SDValue RC = CurDAG->getTargetConstant(AMDGPU::VS_64RegClassID, DL, in SelectAddrSpaceCast()
1254 const SDValue Ops[] = { in SelectAddrSpaceCast()
1258 SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, DL, MVT::i32, in SelectAddrSpaceCast()
1271 SDNode *AMDGPUDAGToDAGISel::getS_BFE(unsigned Opcode, SDLoc DL, SDValue Val, in getS_BFE()
1277 SDValue PackedConst = CurDAG->getTargetConstant(PackedVal, DL, MVT::i32); in getS_BFE()
1287 const SDValue &Shl = N->getOperand(0); in SelectS_BFEFromShifts()
1312 const SDValue &Srl = N->getOperand(0); in SelectS_BFE()
1333 const SDValue &And = N->getOperand(0); in SelectS_BFE()
1360 bool AMDGPUDAGToDAGISel::SelectVOP3Mods(SDValue In, SDValue &Src, in SelectVOP3Mods()
1361 SDValue &SrcMods) const { in SelectVOP3Mods()
1382 bool AMDGPUDAGToDAGISel::SelectVOP3NoMods(SDValue In, SDValue &Src, in SelectVOP3NoMods()
1383 SDValue &SrcMods) const { in SelectVOP3NoMods()
1388 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0(SDValue In, SDValue &Src, in SelectVOP3Mods0()
1389 SDValue &SrcMods, SDValue &Clamp, in SelectVOP3Mods0()
1390 SDValue &Omod) const { in SelectVOP3Mods0()
1399 bool AMDGPUDAGToDAGISel::SelectVOP3NoMods0(SDValue In, SDValue &Src, in SelectVOP3NoMods0()
1400 SDValue &SrcMods, SDValue &Clamp, in SelectVOP3NoMods0()
1401 SDValue &Omod) const { in SelectVOP3NoMods0()
1409 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0Clamp(SDValue In, SDValue &Src, in SelectVOP3Mods0Clamp()
1410 SDValue &SrcMods, in SelectVOP3Mods0Clamp()
1411 SDValue &Omod) const { in SelectVOP3Mods0Clamp()
1418 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0Clamp0OMod(SDValue In, SDValue &Src, in SelectVOP3Mods0Clamp0OMod()
1419 SDValue &SrcMods, in SelectVOP3Mods0Clamp0OMod()
1420 SDValue &Clamp, in SelectVOP3Mods0Clamp0OMod()
1421 SDValue &Omod) const { in SelectVOP3Mods0Clamp0OMod()
1447 SDValue Value = ST->getValue(); in PreprocessISelDAG()
1457 SDValue NewLoad = CurDAG->getLoad(MVT::v2i32, SL, LD->getChain(), in PreprocessISelDAG()
1459 SDValue BitCast = CurDAG->getNode(ISD::BITCAST, SL, in PreprocessISelDAG()
1461 CurDAG->ReplaceAllUsesOfValueWith(SDValue(LD, 1), NewLoad.getValue(1)); in PreprocessISelDAG()
1462 CurDAG->ReplaceAllUsesOfValueWith(SDValue(LD, 0), BitCast); in PreprocessISelDAG()
1467 SDValue NewValue = CurDAG->getNode(ISD::BITCAST, SDLoc(ST), in PreprocessISelDAG()
1469 const SDValue StoreOps[] = { in PreprocessISelDAG()