Lines Matching refs:Rt

131   let AsmString = "$Rd = "#mnemonic#"($Rs, ~$Rt)";
165 : SInst<(outs PredRegs:$Pd), (ins IntRegs:$Rs, IntRegs:$Rt),
166 "$Pd = "#mnemonic#"($Rs, $Rt)", [], "", S_3op_tc_2early_SLOT23>,
176 bits<5> Rt;
181 let Inst{12-8} = Rt;
194 def: Pat<(i1 (seteq (and (xor (i32 IntRegs:$Rs), (i32 IntRegs:$Rt)),
196 (A4_cmpbeq IntRegs:$Rs, IntRegs:$Rt)>;
197 def: Pat<(i1 (setne (and (xor (i32 IntRegs:$Rs), (i32 IntRegs:$Rt)),
199 (C2_not (A4_cmpbeq IntRegs:$Rs, IntRegs:$Rt))>;
200 def: Pat<(i1 (seteq (and (xor (i32 IntRegs:$Rs), (i32 IntRegs:$Rt)),
202 (A4_cmpheq IntRegs:$Rs, IntRegs:$Rt)>;
203 def: Pat<(i1 (setne (and (xor (i32 IntRegs:$Rs), (i32 IntRegs:$Rt)),
205 (C2_not (A4_cmpheq IntRegs:$Rs, IntRegs:$Rt))>;
636 (i32 (shl (i32 IntRegs:$Rt), u2ImmPred:$u2))))),
637 (VT (MI IntRegs:$Rs, IntRegs:$Rt, imm:$u2))>;
653 : Pat<(VT (Load (add (i32 IntRegs:$Rs), (i32 IntRegs:$Rt)))),
654 (VT (MI IntRegs:$Rs, IntRegs:$Rt, 0))>;
857 : STInst < (outs ), (ins IntRegs:$Rs, IntRegs:$Ru, u2Imm:$u2, RC:$Rt),
858 mnemonic#"($Rs + $Ru<<#$u2) = $Rt"#!if(isH, ".h",""),
864 bits<5> Rt;
877 let Inst{4-0} = Rt;
888 (ins PredRegs:$Pv, IntRegs:$Rs, IntRegs:$Ru, u2Imm:$u2, RC:$Rt),
891 ") ")#mnemonic#"($Rs+$Ru<<#$u2) = $Rt"#!if(isH, ".h",""),
897 bits<5> Rt;
915 let Inst{4-0} = Rt;
1040 (i32 (shl (i32 IntRegs:$Rt), u2ImmPred:$u2)))),
1041 (MI IntRegs:$Rs, IntRegs:$Rt, imm:$u2, Value:$Ru)>;
1208 // memb(Rx++#s4:0:circ(Mu))=Rt
1209 // memb(Rx++I:circ(Mu))=Rt
1210 // memb(Rx++Mu)=Rt
1211 // memb(Rx++Mu:brev)=Rt
1212 // memb(gp+#u16:0)=Rt
1216 // memh(Re=#U6)=Rt.H
1217 // memh(Rs+#s11:1)=Rt.H
1218 // memh(Rs+Ru<<#u2)=Rt.H
1221 // memh(Ru<<#u2+#U6)=Rt.H
1222 // memh(Rx++#s4:1:circ(Mu))=Rt.H
1223 // memh(Rx++#s4:1:circ(Mu))=Rt
1224 // memh(Rx++I:circ(Mu))=Rt.H
1225 // memh(Rx++I:circ(Mu))=Rt
1226 // memh(Rx++Mu)=Rt.H
1227 // memh(Rx++Mu)=Rt
1228 // memh(Rx++Mu:brev)=Rt.H
1229 // memh(Rx++Mu:brev)=Rt
1230 // memh(gp+#u16:1)=Rt
1231 // if ([!]Pv[.new]) memh(#u6)=Rt.H
1232 // if ([!]Pv[.new]) memh(#u6)=Rt
1234 // if ([!]Pv[.new]) memh(Rs+#u6:1)=Rt.H
1237 // if ([!]Pv[.new]) memh(Rx++#s4:1)=Rt.H
1241 // memw(Re=#U6)=Rt
1243 // memw(Rx++#s4:2)=Rt
1244 // memw(Rx++#s4:2:circ(Mu))=Rt
1245 // memw(Rx++I:circ(Mu))=Rt
1246 // memw(Rx++Mu)=Rt
1247 // memw(Rx++Mu:brev)=Rt
1616 // if ([!]cmp.eq(Ns.new,Rt)) jump:[n]t #r9:2
1617 // if ([!]cmp.gt(Ns.new,Rt)) jump:[n]t #r9:2
1618 // if ([!]cmp.gtu(Ns.new,Rt)) jump:[n]t #r9:2
1619 // if ([!]cmp.gt(Rt,Ns.new)) jump:[n]t #r9:2
1620 // if ([!]cmp.gtu(Rt,Ns.new)) jump:[n]t #r9:2
1870 def: Pat<(i64 (and (i64 DoubleRegs:$Rs), (i64 (not (i64 DoubleRegs:$Rt))))),
1871 (A4_andnp DoubleRegs:$Rs, DoubleRegs:$Rt)>;
1872 def: Pat<(i64 (or (i64 DoubleRegs:$Rs), (i64 (not (i64 DoubleRegs:$Rt))))),
1873 (A4_ornp DoubleRegs:$Rs, DoubleRegs:$Rt)>;
1876 def S4_parity: ALU64Inst<(outs IntRegs:$Rd), (ins IntRegs:$Rs, IntRegs:$Rt),
1877 "$Rd = parity($Rs, $Rt)", [], "", ALU64_tc_2_SLOT23> {
1880 bits<5> Rt;
1885 let Inst{12-8} = Rt;
2016 // Rdd=vrcrotate(Rss,Rt,#u2)
2020 (ins DoubleRegs:$Rss, IntRegs:$Rt, u2Imm:$u2),
2021 "$Rdd = vrcrotate($Rss, $Rt, #$u2)",
2025 bits<5> Rt;
2033 let Inst{12-8} = Rt;
2040 // Rxx+=vrcrotate(Rss,Rt,#u2)
2044 (ins DoubleRegs:$dst2, DoubleRegs:$Rss, IntRegs:$Rt, u2Imm:$u2),
2045 "$Rxx += vrcrotate($Rss, $Rt, #$u2)", [],
2049 bits<5> Rt;
2057 let Inst{12-8} = Rt;
2066 (ins DoubleRegs:$dst2, DoubleRegs:$Rss, IntRegs:$Rt),
2067 "$Rxx += vrcnegh($Rss, $Rt)", [],
2071 bits<5> Rt;
2078 let Inst{12-8} = Rt;
2121 def A4_modwrapu: ALU64Inst<(outs IntRegs:$Rd), (ins IntRegs:$Rs, IntRegs:$Rt),
2122 "$Rd = modwrap($Rs, $Rt)", [], "", ALU64_tc_2_SLOT23> {
2125 bits<5> Rt;
2130 let Inst{12-8} = Rt;
2137 (ins IntRegs:$Rs, IntRegs:$Rt),
2138 "$Rd = bitsplit($Rs, $Rt)", [], "", ALU64_tc_1_SLOT23> {
2141 bits<5> Rt;
2147 let Inst{12-8} = Rt;
2153 (ins IntRegs:$Rs, IntRegs:$Rt),
2154 "$Rd = packhl($Rs, $Rt):deprecated", [], "", ALU64_tc_1_SLOT23> {
2157 bits<5> Rt;
2163 let Inst{12-8} = Rt;
2169 (ins IntRegs:$Rs, IntRegs:$Rt),
2170 "$Rd = add($Rs, $Rt):sat:deprecated", [], "", ALU64_tc_2_SLOT23> {
2173 bits<5> Rt;
2178 let Inst{12-8} = Rt;
2185 (ins IntRegs:$Rs, IntRegs:$Rt),
2186 "$Rd = sub($Rs, $Rt):sat:deprecated", [], "", ALU64_tc_2_SLOT23> {
2189 bits<5> Rt;
2193 let Inst{20-16} = Rt;
2199 // Rx[&|]=xor(Rs,Rt)
2203 // Rx[&|^]=or(Rs,Rt)
2210 // Rx[&|^]=and(Rs,Rt)
2217 // Rx[&|^]=and(Rs,~Rt)
2271 // Rd=modwrap(Rs,Rt)
2274 // Rd=cround(Rs,Rt)
2276 // Rd=round(Rs,Rt)[:sat]
2282 // Rdd=vcnegh(Rss,Rt)
2283 // Rxx+=vrcnegh(Rss,Rt)
2376 def: Pat<(i1 (seteq (and (shl 1, (i32 IntRegs:$Rt)), (i32 IntRegs:$Rs)), 0)),
2377 (S4_ntstbit_r (i32 IntRegs:$Rs), (i32 IntRegs:$Rt))>;
2403 def: Pat<(i1 (setne (and I32:$Rs, I32:$Rt), 0)),
2404 (C4_nbitsclr I32:$Rs, I32:$Rt)>;
2405 def: Pat<(i1 (setne (and I32:$Rs, I32:$Rt), I32:$Rt)),
2406 (C4_nbitsset I32:$Rs, I32:$Rt)>;
2442 // Rd=add(#u6,mpyi(Rs,Rt))
2446 (ins u6Ext:$u6, IntRegs:$Rs, IntRegs:$Rt),
2447 "$Rd = add(#$u6, mpyi($Rs, $Rt))" ,
2449 (add (mul (i32 IntRegs:$Rs), (i32 IntRegs:$Rt)), u32ImmPred:$u6))],
2454 bits<5> Rt;
2462 let Inst{12-8} = Rt;
2541 // Rdd=vmpyhsu(Rs,Rt)[:<<]:sat
2545 // Rxx+=vmpyhsu(Rs,Rt)[:<<1]:sat
2550 // Rdd=vpmpyh(Rs,Rt)
2553 // Rxx^=vpmpyh(Rs,Rt)
2557 // Rdd=pmpyw(Rs,Rt)
2560 // Rxx^=pmpyw(Rs,Rt)
2681 // Rdd=vcnegh(Rss,Rt)
2685 // Rd=[cround|round](Rs,Rt)
2691 // Rd=round(Rs,Rt):sat
2695 // Rd=[cmpyiwh|cmpyrwh](Rss,Rt):<<1:rnd:sat
2768 def S4_lsli: SInst <(outs IntRegs:$Rd), (ins s6Imm:$s6, IntRegs:$Rt),
2769 "$Rd = lsl(#$s6, $Rt)" ,
2771 (i32 IntRegs:$Rt)))],
2775 bits<5> Rt;
2781 let Inst{12-8} = Rt;
3103 // mem[bhw](Rs+#0) [+-&|]= Rt
3104 // mem[bhw](Rs+#U6:[012]) [+-&|]= Rt
3110 // mem[bhw](Rs+#0) [+-&|]= Rt
3115 // mem[bhw](Rs+#U6:[012]) [+-&|]= Rt
3534 // mem[bhwd](#global)=Rt
3536 // if ([!]Pv[.new]) mem[bhwd](##global)=Rt
3957 (ins DoubleRegs:$Rs, IntRegs:$Rt),
3958 "$Pd = tlbmatch($Rs, $Rt)",
3962 bits<5> Rt;
3968 let Inst{12-8} = Rt;
4052 : InstHexagon<(outs), (ins IntRegs:$Rs, IntRegs:$Rt, brtarget:$r9_2),
4053 ""#px#" = cmp."#op#"($Rs, $Rt); if ("
4057 bits<4> Rt;
4077 let Inst{11-8} = Rt;