Lines Matching refs:IndexReg
61 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is16BitMemOperand() local
69 (IndexReg.getReg() != 0 && in Is16BitMemOperand()
70 X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg.getReg()))) in Is16BitMemOperand()
227 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is32BitMemOperand() local
231 (IndexReg.getReg() != 0 && in Is32BitMemOperand()
232 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg.getReg()))) in Is32BitMemOperand()
242 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is64BitMemOperand() local
246 (IndexReg.getReg() != 0 && in Is64BitMemOperand()
247 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg.getReg()))) in Is64BitMemOperand()
371 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in EmitMemModRMByte() local
378 assert(IndexReg.getReg() == 0 && "Invalid rip-relative address"); in EmitMemModRMByte()
423 if (IndexReg.getReg()) { in EmitMemModRMByte()
424 unsigned IndexReg16 = R16Table[GetX86RegNum(IndexReg)]; in EmitMemModRMByte()
469 IndexReg.getReg() == 0 && in EmitMemModRMByte()
519 assert(IndexReg.getReg() != X86::ESP && in EmitMemModRMByte()
520 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!"); in EmitMemModRMByte()
563 if (IndexReg.getReg()) in EmitMemModRMByte()
564 IndexRegNo = GetX86RegNum(IndexReg); in EmitMemModRMByte()
570 if (IndexReg.getReg()) in EmitMemModRMByte()
571 IndexRegNo = GetX86RegNum(IndexReg); in EmitMemModRMByte()