Lines Matching refs:i16

7 @llvm_mips_mul_q_h_ARG1 = global <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>…
8 @llvm_mips_mul_q_h_ARG2 = global <8 x i16> <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i…
9 @llvm_mips_mul_q_h_RES  = global <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>…
13   %0 = load <8 x i16>, <8 x i16>* @llvm_mips_mul_q_h_ARG1
14   %1 = load <8 x i16>, <8 x i16>* @llvm_mips_mul_q_h_ARG2
15   %2 = tail call <8 x i16> @llvm.mips.mul.q.h(<8 x i16> %0, <8 x i16> %1)
16   store <8 x i16> %2, <8 x i16>* @llvm_mips_mul_q_h_RES
20 declare <8 x i16> @llvm.mips.mul.q.h(<8 x i16>, <8 x i16>) nounwind
51 @llvm_mips_mulr_q_h_ARG1 = global <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7…
52 @llvm_mips_mulr_q_h_ARG2 = global <8 x i16> <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, …
53 @llvm_mips_mulr_q_h_RES  = global <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0…
57   %0 = load <8 x i16>, <8 x i16>* @llvm_mips_mulr_q_h_ARG1
58   %1 = load <8 x i16>, <8 x i16>* @llvm_mips_mulr_q_h_ARG2
59   %2 = tail call <8 x i16> @llvm.mips.mulr.q.h(<8 x i16> %0, <8 x i16> %1)
60   store <8 x i16> %2, <8 x i16>* @llvm_mips_mulr_q_h_RES
64 declare <8 x i16> @llvm.mips.mulr.q.h(<8 x i16>, <8 x i16>) nounwind