Lines Matching +full:- +full:g
2 // Use of this source code is governed by a BSD-style license that can be
7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h"
21 // Adds Mips-specific methods for generating InstructionOperands.
66 MipsOperandGenerator g(selector); in VisitRRR() local
67 selector->Emit(opcode, g.DefineAsRegister(node), in VisitRRR()
68 g.UseRegister(node->InputAt(0)), in VisitRRR()
69 g.UseRegister(node->InputAt(1))); in VisitRRR()
75 MipsOperandGenerator g(selector); in VisitRR() local
76 selector->Emit(opcode, g.DefineAsRegister(node), in VisitRR()
77 g.UseRegister(node->InputAt(0))); in VisitRR()
83 MipsOperandGenerator g(selector); in VisitRRO() local
84 selector->Emit(opcode, g.DefineAsRegister(node), in VisitRRO()
85 g.UseRegister(node->InputAt(0)), in VisitRRO()
86 g.UseOperand(node->InputAt(1), opcode)); in VisitRRO()
92 MipsOperandGenerator g(selector); in VisitBinop() local
99 inputs[input_count++] = g.UseRegister(m.left().node()); in VisitBinop()
100 inputs[input_count++] = g.UseOperand(m.right().node(), opcode); in VisitBinop()
102 if (cont->IsBranch()) { in VisitBinop()
103 inputs[input_count++] = g.Label(cont->true_block()); in VisitBinop()
104 inputs[input_count++] = g.Label(cont->false_block()); in VisitBinop()
107 outputs[output_count++] = g.DefineAsRegister(node); in VisitBinop()
108 if (cont->IsSet()) { in VisitBinop()
109 outputs[output_count++] = g.DefineAsRegister(cont->result()); in VisitBinop()
117 selector->Emit(cont->Encode(opcode), output_count, outputs, input_count, in VisitBinop()
130 LoadRepresentation load_rep = LoadRepresentationOf(node->op()); in VisitLoad()
131 MipsOperandGenerator g(this); in VisitLoad() local
132 Node* base = node->InputAt(0); in VisitLoad()
133 Node* index = node->InputAt(1); in VisitLoad()
160 if (g.CanBeImmediate(index, opcode)) { in VisitLoad()
162 g.DefineAsRegister(node), g.UseRegister(base), g.UseImmediate(index)); in VisitLoad()
164 InstructionOperand addr_reg = g.TempRegister(); in VisitLoad()
166 g.UseRegister(index), g.UseRegister(base)); in VisitLoad()
169 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0)); in VisitLoad()
175 MipsOperandGenerator g(this); in VisitStore() local
176 Node* base = node->InputAt(0); in VisitStore()
177 Node* index = node->InputAt(1); in VisitStore()
178 Node* value = node->InputAt(2); in VisitStore()
180 StoreRepresentation store_rep = StoreRepresentationOf(node->op()); in VisitStore()
189 inputs[input_count++] = g.UseUniqueRegister(base); in VisitStore()
190 inputs[input_count++] = g.UseUniqueRegister(index); in VisitStore()
192 ? g.UseRegister(value) in VisitStore()
193 : g.UseUniqueRegister(value); in VisitStore()
209 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStore()
240 if (g.CanBeImmediate(index, opcode)) { in VisitStore()
241 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), in VisitStore()
242 g.UseRegister(base), g.UseImmediate(index), g.UseRegister(value)); in VisitStore()
244 InstructionOperand addr_reg = g.TempRegister(); in VisitStore()
246 g.UseRegister(index), g.UseRegister(base)); in VisitStore()
248 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), in VisitStore()
249 addr_reg, g.TempImmediate(0), g.UseRegister(value)); in VisitStore()
256 MipsOperandGenerator g(this); in VisitWord32And() local
264 // The mask must be contiguous, and occupy the least-significant bits. in VisitWord32And()
278 if (lsb + mask_width > 32) mask_width = 32 - lsb; in VisitWord32And()
280 Emit(kMipsExt, g.DefineAsRegister(node), in VisitWord32And()
281 g.UseRegister(mleft.left().node()), g.TempImmediate(lsb), in VisitWord32And()
282 g.TempImmediate(mask_width)); in VisitWord32And()
293 // Insert zeros for (x >> K) << K => x & ~(2^K - 1) expression reduction in VisitWord32And()
295 Emit(kMipsIns, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitWord32And()
296 g.TempImmediate(0), g.TempImmediate(shift)); in VisitWord32And()
312 m.right().Is(-1)) { in VisitWord32Xor()
315 MipsOperandGenerator g(this); in VisitWord32Xor() local
316 Emit(kMipsNor, g.DefineAsRegister(node), in VisitWord32Xor()
317 g.UseRegister(mleft.left().node()), in VisitWord32Xor()
318 g.UseRegister(mleft.right().node())); in VisitWord32Xor()
322 if (m.right().Is(-1)) { in VisitWord32Xor()
324 MipsOperandGenerator g(this); in VisitWord32Xor() local
325 Emit(kMipsNor, g.DefineAsRegister(node), g.UseRegister(m.left().node()), in VisitWord32Xor()
326 g.TempImmediate(0)); in VisitWord32Xor()
337 MipsOperandGenerator g(this); in VisitWord32Shl() local
340 // contiguous, and the shift immediate non-zero. in VisitWord32Shl()
352 Emit(kMipsShl, g.DefineAsRegister(node), in VisitWord32Shl()
353 g.UseRegister(mleft.left().node()), in VisitWord32Shl()
354 g.UseImmediate(m.right().node())); in VisitWord32Shl()
371 // shifted into the least-significant bits. in VisitWord32Shr()
376 MipsOperandGenerator g(this); in VisitWord32Shr() local
378 Emit(kMipsExt, g.DefineAsRegister(node), in VisitWord32Shr()
379 g.UseRegister(mleft.left().node()), g.TempImmediate(lsb), in VisitWord32Shr()
380 g.TempImmediate(mask_width)); in VisitWord32Shr()
411 MipsOperandGenerator g(this); in VisitInt32Add() local
424 MipsOperandGenerator g(this); in VisitInt32Mul() local
430 g.DefineAsRegister(node), g.UseRegister(m.left().node()), in VisitInt32Mul()
431 g.TempImmediate(WhichPowerOf2(value))); in VisitInt32Mul()
434 if (base::bits::IsPowerOfTwo32(value - 1)) { in VisitInt32Mul()
435 InstructionOperand temp = g.TempRegister(); in VisitInt32Mul()
437 g.UseRegister(m.left().node()), in VisitInt32Mul()
438 g.TempImmediate(WhichPowerOf2(value - 1))); in VisitInt32Mul()
440 g.DefineAsRegister(node), g.UseRegister(m.left().node()), temp); in VisitInt32Mul()
444 InstructionOperand temp = g.TempRegister(); in VisitInt32Mul()
446 g.UseRegister(m.left().node()), in VisitInt32Mul()
447 g.TempImmediate(WhichPowerOf2(value + 1))); in VisitInt32Mul()
449 g.DefineAsRegister(node), temp, g.UseRegister(m.left().node())); in VisitInt32Mul()
463 MipsOperandGenerator g(this); in VisitUint32MulHigh() local
464 Emit(kMipsMulHighU, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), in VisitUint32MulHigh()
465 g.UseRegister(node->InputAt(1))); in VisitUint32MulHigh()
470 MipsOperandGenerator g(this); in VisitInt32Div() local
472 Emit(kMipsDiv, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitInt32Div()
473 g.UseRegister(m.right().node())); in VisitInt32Div()
478 MipsOperandGenerator g(this); in VisitUint32Div() local
480 Emit(kMipsDivU, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitUint32Div()
481 g.UseRegister(m.right().node())); in VisitUint32Div()
486 MipsOperandGenerator g(this); in VisitInt32Mod() local
488 Emit(kMipsMod, g.DefineAsRegister(node), g.UseRegister(m.left().node()), in VisitInt32Mod()
489 g.UseRegister(m.right().node())); in VisitInt32Mod()
494 MipsOperandGenerator g(this); in VisitUint32Mod() local
496 Emit(kMipsModU, g.DefineAsRegister(node), g.UseRegister(m.left().node()), in VisitUint32Mod()
497 g.UseRegister(m.right().node())); in VisitUint32Mod()
517 MipsOperandGenerator g(this); in VisitChangeFloat64ToInt32() local
518 Node* value = node->InputAt(0); in VisitChangeFloat64ToInt32()
522 switch (value->opcode()) { in VisitChangeFloat64ToInt32()
524 Emit(kMipsFloorWD, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
525 g.UseRegister(value->InputAt(0))); in VisitChangeFloat64ToInt32()
528 Emit(kMipsCeilWD, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
529 g.UseRegister(value->InputAt(0))); in VisitChangeFloat64ToInt32()
532 Emit(kMipsRoundWD, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
533 g.UseRegister(value->InputAt(0))); in VisitChangeFloat64ToInt32()
536 Emit(kMipsTruncWD, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
537 g.UseRegister(value->InputAt(0))); in VisitChangeFloat64ToInt32()
542 if (value->opcode() == IrOpcode::kChangeFloat32ToFloat64) { in VisitChangeFloat64ToInt32()
543 Node* next = value->InputAt(0); in VisitChangeFloat64ToInt32()
546 switch (next->opcode()) { in VisitChangeFloat64ToInt32()
548 Emit(kMipsFloorWS, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
549 g.UseRegister(next->InputAt(0))); in VisitChangeFloat64ToInt32()
552 Emit(kMipsCeilWS, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
553 g.UseRegister(next->InputAt(0))); in VisitChangeFloat64ToInt32()
556 Emit(kMipsRoundWS, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
557 g.UseRegister(next->InputAt(0))); in VisitChangeFloat64ToInt32()
560 Emit(kMipsTruncWS, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
561 g.UseRegister(next->InputAt(0))); in VisitChangeFloat64ToInt32()
564 Emit(kMipsTruncWS, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
565 g.UseRegister(value->InputAt(0))); in VisitChangeFloat64ToInt32()
569 // Match float32 -> float64 -> int32 representation change path. in VisitChangeFloat64ToInt32()
570 Emit(kMipsTruncWS, g.DefineAsRegister(node), in VisitChangeFloat64ToInt32()
571 g.UseRegister(value->InputAt(0))); in VisitChangeFloat64ToInt32()
586 MipsOperandGenerator g(this); in VisitTruncateFloat64ToFloat32() local
587 Node* value = node->InputAt(0); in VisitTruncateFloat64ToFloat32()
591 value->opcode() == IrOpcode::kChangeInt32ToFloat64) { in VisitTruncateFloat64ToFloat32()
592 Emit(kMipsCvtSW, g.DefineAsRegister(node), in VisitTruncateFloat64ToFloat32()
593 g.UseRegister(value->InputAt(0))); in VisitTruncateFloat64ToFloat32()
601 switch (TruncationModeOf(node->op())) { in VisitTruncateFloat64ToInt32()
617 MipsOperandGenerator g(this); in VisitBitcastInt32ToFloat32() local
618 Emit(kMipsFloat64InsertLowWord32, g.DefineAsRegister(node), in VisitBitcastInt32ToFloat32()
620 g.UseRegister(node->InputAt(0))); in VisitBitcastInt32ToFloat32()
640 MipsOperandGenerator g(this); in VisitFloat64Sub() local
644 if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub && in VisitFloat64Sub()
648 Emit(kMipsFloat64RoundUp, g.DefineAsRegister(node), in VisitFloat64Sub()
649 g.UseRegister(mright0.right().node())); in VisitFloat64Sub()
679 MipsOperandGenerator g(this); in VisitFloat64Mod() local
680 Emit(kMipsModD, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f12), in VisitFloat64Mod()
681 g.UseFixed(node->InputAt(1), f14))->MarkAsCall(); in VisitFloat64Mod()
686 MipsOperandGenerator g(this); in VisitFloat32Max() local
688 Emit(kMipsFloat32Max, g.DefineAsRegister(node), in VisitFloat32Max()
689 g.UseUniqueRegister(node->InputAt(0)), in VisitFloat32Max()
690 g.UseUniqueRegister(node->InputAt(1))); in VisitFloat32Max()
694 Emit(kMipsFloat32Max, g.DefineSameAsFirst(node), in VisitFloat32Max()
695 g.UseRegister(node->InputAt(1)), g.UseRegister(node->InputAt(0))); in VisitFloat32Max()
701 MipsOperandGenerator g(this); in VisitFloat64Max() local
703 Emit(kMipsFloat64Max, g.DefineAsRegister(node), in VisitFloat64Max()
704 g.UseUniqueRegister(node->InputAt(0)), in VisitFloat64Max()
705 g.UseUniqueRegister(node->InputAt(1))); in VisitFloat64Max()
709 Emit(kMipsFloat64Max, g.DefineSameAsFirst(node), in VisitFloat64Max()
710 g.UseRegister(node->InputAt(1)), g.UseRegister(node->InputAt(0))); in VisitFloat64Max()
716 MipsOperandGenerator g(this); in VisitFloat32Min() local
718 Emit(kMipsFloat32Min, g.DefineAsRegister(node), in VisitFloat32Min()
719 g.UseUniqueRegister(node->InputAt(0)), in VisitFloat32Min()
720 g.UseUniqueRegister(node->InputAt(1))); in VisitFloat32Min()
724 Emit(kMipsFloat32Min, g.DefineSameAsFirst(node), in VisitFloat32Min()
725 g.UseRegister(node->InputAt(1)), g.UseRegister(node->InputAt(0))); in VisitFloat32Min()
731 MipsOperandGenerator g(this); in VisitFloat64Min() local
733 Emit(kMipsFloat64Min, g.DefineAsRegister(node), in VisitFloat64Min()
734 g.UseUniqueRegister(node->InputAt(0)), in VisitFloat64Min()
735 g.UseUniqueRegister(node->InputAt(1))); in VisitFloat64Min()
739 Emit(kMipsFloat64Min, g.DefineSameAsFirst(node), in VisitFloat64Min()
740 g.UseRegister(node->InputAt(1)), g.UseRegister(node->InputAt(0))); in VisitFloat64Min()
813 MipsOperandGenerator g(this); in EmitPrepareArguments() local
816 if (descriptor->IsCFunctionCall()) { in EmitPrepareArguments()
818 MiscField::encode(static_cast<int>(descriptor->CParameterCount())), in EmitPrepareArguments()
824 Emit(kMipsStoreToStackSlot, g.NoOutput(), g.UseRegister(input.node()), in EmitPrepareArguments()
825 g.TempImmediate(slot << kPointerSizeLog2)); in EmitPrepareArguments()
830 int push_count = static_cast<int>(descriptor->StackParameterCount()); in EmitPrepareArguments()
832 Emit(kMipsStackClaim, g.NoOutput(), in EmitPrepareArguments()
833 g.TempImmediate(push_count << kPointerSizeLog2)); in EmitPrepareArguments()
835 for (size_t n = 0; n < arguments->size(); ++n) { in EmitPrepareArguments()
838 Emit(kMipsStoreToStackSlot, g.NoOutput(), g.UseRegister(input.node()), in EmitPrepareArguments()
839 g.TempImmediate(n << kPointerSizeLog2)); in EmitPrepareArguments()
850 CheckedLoadRepresentation load_rep = CheckedLoadRepresentationOf(node->op()); in VisitCheckedLoad()
851 MipsOperandGenerator g(this); in VisitCheckedLoad() local
852 Node* const buffer = node->InputAt(0); in VisitCheckedLoad()
853 Node* const offset = node->InputAt(1); in VisitCheckedLoad()
854 Node* const length = node->InputAt(2); in VisitCheckedLoad()
879 InstructionOperand offset_operand = g.CanBeImmediate(offset, opcode) in VisitCheckedLoad()
880 ? g.UseImmediate(offset) in VisitCheckedLoad()
881 : g.UseRegister(offset); in VisitCheckedLoad()
883 InstructionOperand length_operand = (!g.CanBeImmediate(offset, opcode)) in VisitCheckedLoad()
884 ? g.CanBeImmediate(length, opcode) in VisitCheckedLoad()
885 ? g.UseImmediate(length) in VisitCheckedLoad()
886 : g.UseRegister(length) in VisitCheckedLoad()
887 : g.UseRegister(length); in VisitCheckedLoad()
890 g.DefineAsRegister(node), offset_operand, length_operand, in VisitCheckedLoad()
891 g.UseRegister(buffer)); in VisitCheckedLoad()
896 MachineRepresentation rep = CheckedStoreRepresentationOf(node->op()); in VisitCheckedStore()
897 MipsOperandGenerator g(this); in VisitCheckedStore() local
898 Node* const buffer = node->InputAt(0); in VisitCheckedStore()
899 Node* const offset = node->InputAt(1); in VisitCheckedStore()
900 Node* const length = node->InputAt(2); in VisitCheckedStore()
901 Node* const value = node->InputAt(3); in VisitCheckedStore()
923 InstructionOperand offset_operand = g.CanBeImmediate(offset, opcode) in VisitCheckedStore()
924 ? g.UseImmediate(offset) in VisitCheckedStore()
925 : g.UseRegister(offset); in VisitCheckedStore()
927 InstructionOperand length_operand = (!g.CanBeImmediate(offset, opcode)) in VisitCheckedStore()
928 ? g.CanBeImmediate(length, opcode) in VisitCheckedStore()
929 ? g.UseImmediate(length) in VisitCheckedStore()
930 : g.UseRegister(length) in VisitCheckedStore()
931 : g.UseRegister(length); in VisitCheckedStore()
933 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), in VisitCheckedStore()
934 offset_operand, length_operand, g.UseRegister(value), in VisitCheckedStore()
935 g.UseRegister(buffer)); in VisitCheckedStore()
945 MipsOperandGenerator g(selector); in VisitCompare() local
946 opcode = cont->Encode(opcode); in VisitCompare()
947 if (cont->IsBranch()) { in VisitCompare()
948 selector->Emit(opcode, g.NoOutput(), left, right, in VisitCompare()
949 g.Label(cont->true_block()), g.Label(cont->false_block())); in VisitCompare()
951 DCHECK(cont->IsSet()); in VisitCompare()
952 selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right); in VisitCompare()
960 MipsOperandGenerator g(selector); in VisitFloat32Compare() local
964 lhs = m.left().IsZero() ? g.UseImmediate(m.left().node()) in VisitFloat32Compare()
965 : g.UseRegister(m.left().node()); in VisitFloat32Compare()
966 rhs = m.right().IsZero() ? g.UseImmediate(m.right().node()) in VisitFloat32Compare()
967 : g.UseRegister(m.right().node()); in VisitFloat32Compare()
975 MipsOperandGenerator g(selector); in VisitFloat64Compare() local
979 lhs = m.left().IsZero() ? g.UseImmediate(m.left().node()) in VisitFloat64Compare()
980 : g.UseRegister(m.left().node()); in VisitFloat64Compare()
981 rhs = m.right().IsZero() ? g.UseImmediate(m.right().node()) in VisitFloat64Compare()
982 : g.UseRegister(m.right().node()); in VisitFloat64Compare()
991 MipsOperandGenerator g(selector); in VisitWordCompare() local
992 Node* left = node->InputAt(0); in VisitWordCompare()
993 Node* right = node->InputAt(1); in VisitWordCompare()
996 if (g.CanBeImmediate(right, opcode)) { in VisitWordCompare()
997 switch (cont->condition()) { in VisitWordCompare()
1000 if (cont->IsSet()) { in VisitWordCompare()
1001 VisitCompare(selector, opcode, g.UseRegister(left), in VisitWordCompare()
1002 g.UseImmediate(right), cont); in VisitWordCompare()
1004 VisitCompare(selector, opcode, g.UseRegister(left), in VisitWordCompare()
1005 g.UseRegister(right), cont); in VisitWordCompare()
1012 VisitCompare(selector, opcode, g.UseRegister(left), in VisitWordCompare()
1013 g.UseImmediate(right), cont); in VisitWordCompare()
1016 VisitCompare(selector, opcode, g.UseRegister(left), in VisitWordCompare()
1017 g.UseRegister(right), cont); in VisitWordCompare()
1019 } else if (g.CanBeImmediate(left, opcode)) { in VisitWordCompare()
1020 if (!commutative) cont->Commute(); in VisitWordCompare()
1021 switch (cont->condition()) { in VisitWordCompare()
1024 if (cont->IsSet()) { in VisitWordCompare()
1025 VisitCompare(selector, opcode, g.UseRegister(right), in VisitWordCompare()
1026 g.UseImmediate(left), cont); in VisitWordCompare()
1028 VisitCompare(selector, opcode, g.UseRegister(right), in VisitWordCompare()
1029 g.UseRegister(left), cont); in VisitWordCompare()
1036 VisitCompare(selector, opcode, g.UseRegister(right), in VisitWordCompare()
1037 g.UseImmediate(left), cont); in VisitWordCompare()
1040 VisitCompare(selector, opcode, g.UseRegister(right), in VisitWordCompare()
1041 g.UseRegister(left), cont); in VisitWordCompare()
1044 VisitCompare(selector, opcode, g.UseRegister(left), g.UseRegister(right), in VisitWordCompare()
1061 while (selector->CanCover(user, value)) { in VisitWordCompareZero()
1062 switch (value->opcode()) { in VisitWordCompareZero()
1070 cont->Negate(); in VisitWordCompareZero()
1073 cont->OverwriteAndNegateIfEqual(kEqual); in VisitWordCompareZero()
1077 cont->OverwriteAndNegateIfEqual(kSignedLessThan); in VisitWordCompareZero()
1080 cont->OverwriteAndNegateIfEqual(kSignedLessThanOrEqual); in VisitWordCompareZero()
1083 cont->OverwriteAndNegateIfEqual(kUnsignedLessThan); in VisitWordCompareZero()
1086 cont->OverwriteAndNegateIfEqual(kUnsignedLessThanOrEqual); in VisitWordCompareZero()
1089 cont->OverwriteAndNegateIfEqual(kEqual); in VisitWordCompareZero()
1092 cont->OverwriteAndNegateIfEqual(kUnsignedLessThan); in VisitWordCompareZero()
1095 cont->OverwriteAndNegateIfEqual(kUnsignedLessThanOrEqual); in VisitWordCompareZero()
1098 cont->OverwriteAndNegateIfEqual(kEqual); in VisitWordCompareZero()
1101 cont->OverwriteAndNegateIfEqual(kUnsignedLessThan); in VisitWordCompareZero()
1104 cont->OverwriteAndNegateIfEqual(kUnsignedLessThanOrEqual); in VisitWordCompareZero()
1109 if (ProjectionIndexOf(value->op()) == 1u) { in VisitWordCompareZero()
1115 Node* const node = value->InputAt(0); in VisitWordCompareZero()
1117 if (!result || selector->IsDefined(result)) { in VisitWordCompareZero()
1118 switch (node->opcode()) { in VisitWordCompareZero()
1120 cont->OverwriteAndNegateIfEqual(kOverflow); in VisitWordCompareZero()
1123 cont->OverwriteAndNegateIfEqual(kOverflow); in VisitWordCompareZero()
1140 MipsOperandGenerator g(selector); in VisitWordCompareZero() local
1141 InstructionCode const opcode = cont->Encode(kMipsCmp); in VisitWordCompareZero()
1142 InstructionOperand const value_operand = g.UseRegister(value); in VisitWordCompareZero()
1143 if (cont->IsBranch()) { in VisitWordCompareZero()
1144 selector->Emit(opcode, g.NoOutput(), value_operand, g.TempImmediate(0), in VisitWordCompareZero()
1145 g.Label(cont->true_block()), g.Label(cont->false_block())); in VisitWordCompareZero()
1147 selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand, in VisitWordCompareZero()
1148 g.TempImmediate(0)); in VisitWordCompareZero()
1156 VisitWordCompareZero(this, branch, branch->InputAt(0), &cont); in VisitBranch()
1161 MipsOperandGenerator g(this); in VisitSwitch() local
1162 InstructionOperand value_operand = g.UseRegister(node->InputAt(0)); in VisitSwitch()
1175 index_operand = g.TempRegister(); in VisitSwitch()
1177 g.TempImmediate(sw.min_value)); in VisitSwitch()
1279 MipsOperandGenerator g(this); in VisitFloat64ExtractLowWord32() local
1280 Emit(kMipsFloat64ExtractLowWord32, g.DefineAsRegister(node), in VisitFloat64ExtractLowWord32()
1281 g.UseRegister(node->InputAt(0))); in VisitFloat64ExtractLowWord32()
1286 MipsOperandGenerator g(this); in VisitFloat64ExtractHighWord32() local
1287 Emit(kMipsFloat64ExtractHighWord32, g.DefineAsRegister(node), in VisitFloat64ExtractHighWord32()
1288 g.UseRegister(node->InputAt(0))); in VisitFloat64ExtractHighWord32()
1293 MipsOperandGenerator g(this); in VisitFloat64InsertLowWord32() local
1294 Node* left = node->InputAt(0); in VisitFloat64InsertLowWord32()
1295 Node* right = node->InputAt(1); in VisitFloat64InsertLowWord32()
1296 Emit(kMipsFloat64InsertLowWord32, g.DefineSameAsFirst(node), in VisitFloat64InsertLowWord32()
1297 g.UseRegister(left), g.UseRegister(right)); in VisitFloat64InsertLowWord32()
1302 MipsOperandGenerator g(this); in VisitFloat64InsertHighWord32() local
1303 Node* left = node->InputAt(0); in VisitFloat64InsertHighWord32()
1304 Node* right = node->InputAt(1); in VisitFloat64InsertHighWord32()
1305 Emit(kMipsFloat64InsertHighWord32, g.DefineSameAsFirst(node), in VisitFloat64InsertHighWord32()
1306 g.UseRegister(left), g.UseRegister(right)); in VisitFloat64InsertHighWord32()