102 #define PS (dis->stream)  in print_insn_rl78()  macro
103 #define PC(c) PR (PS, "%c", c)  in print_insn_rl78()
197 		PR (PS, " \033[33mW\033[0m");  in print_insn_rl78()
204 		  PR (PS, "  \033[35m");  in print_insn_rl78()
207 		    { PR (PS, "Z"); comma = ","; }  in print_insn_rl78()
209 		    { PR (PS, "%sAC", comma); comma = ","; }  in print_insn_rl78()
211 		    { PR (PS, "%sCY", comma); comma = ","; }  in print_insn_rl78()
212 		  PR (PS, "\033[0m");  in print_insn_rl78()
224 		  PR (PS, "es:");  in print_insn_rl78()
232 		PR (PS, "%s", condition_names[oper->condition]);  in print_insn_rl78()
244 		  PR (PS, "%#x", oper->addend);  in print_insn_rl78()
246 		  PR (PS, "%d", oper->addend);  in print_insn_rl78()
250 		PR (PS, "%s", register_names[oper->reg]);  in print_insn_rl78()
254 		PR (PS, "%s.%d", register_names[oper->reg], oper->bit_number);  in print_insn_rl78()
263 		      PR (PS, "psw");  in print_insn_rl78()
265 		      PR (PS, "sp");  in print_insn_rl78()
267 		      PR (PS, "%#x", oper->addend);  in print_insn_rl78()
280 		    PR (PS, "%d[%s]", oper->addend, register_names[oper->reg]);  in print_insn_rl78()
284 		    PR (PS, "[%s", register_names[oper->reg]);  in print_insn_rl78()
286 		      PR (PS, "+%s", register_names[oper->reg2]);  in print_insn_rl78()
288 		      PR (PS, "+%d", oper->addend);  in print_insn_rl78()
294 		  PR (PS, ".%d", oper->bit_number);  in print_insn_rl78()
302 		PR (PS, "[%s++]", register_names[oper->reg]);  in print_insn_rl78()
305 		PR (PS, "[--%s]", register_names[oper->reg]);  in print_insn_rl78()
315 		PR (PS, "???%d.%d", opcode.lineno, *s - '0');  in print_insn_rl78()
324   PR (PS, "\t\033[34m(line %d)\033[0m", opcode.lineno);  in print_insn_rl78()