/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
D | nv50_ir_target.h | 139 struct OpInfo struct 141 OpInfo *variants; argument 161 inline const OpInfo& getOpInfo(const Instruction *) const; argument
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/external/llvm/utils/TableGen/ |
D | AsmWriterInst.cpp | 171 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; in AsmWriterInst() local
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D | InstrInfoEmitter.cpp | 465 const OperandInfoMapTy &OpInfo, in emitRecord()
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D | FixedLenDecoderEmitter.cpp | 1060 const OperandInfo &OpInfo, in emitBinaryParser() 1898 OperandInfo OpInfo(Decoder, HasCompleteDecoder); in populateInstruction() local 1977 OperandInfo OpInfo(Decoder, HasCompleteDecoder); in populateInstruction() local
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D | AsmMatcherEmitter.cpp | 1628 const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i]; in buildInstructionResultOperands() local 1677 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; in buildAliasResultOperands() local 1844 const MatchableInfo::ResOperand &OpInfo = II->ResOperands[i]; in emitConvertFuncs() local
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D | CodeGenDAGPatterns.cpp | 2779 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N1->getOperator()); in IsNodeBitcast() local
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 2334 AsmOperandInfo &OpInfo = ConstraintOperands.back(); in ParseConstraints() local 2425 AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; in ParseConstraints() local 2473 AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; in ParseConstraints() local 2613 static void ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo, in ChooseConstraint() 2664 void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo, in ComputeConstraintToUse()
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D | SelectionDAGBuilder.cpp | 6006 SDISelAsmOperandInfo &OpInfo) { in GetRegistersForValue() 6122 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back(); in visitInlineAsm() local 6197 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i]; in visitInlineAsm() local 6289 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i]; in visitInlineAsm() local 6321 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in visitInlineAsm() local 6352 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i]; in visitInlineAsm() local
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.h | 347 const MCOperandInfo &OpInfo = get(Opcode).OpInfo[OpNo]; in getOpSize() local
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D | SIInstrInfo.cpp | 1360 const MCOperandInfo &OpInfo = get(MI->getOpcode()).OpInfo[OpNo]; in isImmOperandLegal() local 1769 const MCOperandInfo &OpInfo, in isLegalRegOperand() 1793 const MCOperandInfo &OpInfo, in isLegalVSrcOperand() 1807 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpIdx]; in isOperandLegal() local
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/external/llvm/lib/Analysis/ |
D | CostModel.cpp | 125 TargetTransformInfo::OperandValueKind OpInfo = in getOperandInfo() local
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/external/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 149 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands variable
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/external/clang/lib/CodeGen/ |
D | CGExprComplex.cpp | 832 BinOpInfo OpInfo; in EmitCompoundAssignLValue() local
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D | CGExprScalar.cpp | 2110 BinOpInfo OpInfo; in EmitCompoundAssignLValue() local
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 570 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in AddThumb1SBit() local 635 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in AddThumbPredicate() local 672 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in UpdateThumbVFPPredicate() local
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/external/llvm/lib/CodeGen/ |
D | CodeGenPrepare.cpp | 3413 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in IsOperandAMemoryOperand() local 3974 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in optimizeInlineAsmInst() local
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1718 const MCOperandInfo &OpInfo = MCID.OpInfo[i]; in processInstruction() local 1752 const MCOperandInfo &OpInfo = MCID.OpInfo[i]; in processInstruction() local
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