| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 592 void shll(CpuRegister operand, CpuRegister shifter);
594 void shrl(CpuRegister operand, CpuRegister shifter);
596 void sarl(CpuRegister operand, CpuRegister shifter);
599 void shlq(CpuRegister operand, CpuRegister shifter);
601 void shrq(CpuRegister operand, CpuRegister shifter);
603 void sarq(CpuRegister operand, CpuRegister shifter);
659 void rorl(CpuRegister operand, CpuRegister shifter);
661 void roll(CpuRegister operand, CpuRegister shifter);
664 void rorq(CpuRegister operand, CpuRegister shifter);
666 void rolq(CpuRegister operand, CpuRegister shifter);
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| D | assembler_x86_64.cc | 1835 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { in shll() argument
1836 EmitGenericShift(false, 4, operand, shifter); in shll()
1840 void X86_64Assembler::shlq(CpuRegister operand, CpuRegister shifter) { in shlq() argument
1841 EmitGenericShift(true, 4, operand, shifter); in shlq()
1855 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { in shrl() argument
1856 EmitGenericShift(false, 5, operand, shifter); in shrl()
1860 void X86_64Assembler::shrq(CpuRegister operand, CpuRegister shifter) { in shrq() argument
1861 EmitGenericShift(true, 5, operand, shifter); in shrq()
1870 void X86_64Assembler::sarl(CpuRegister operand, CpuRegister shifter) { in sarl() argument
1871 EmitGenericShift(false, 7, operand, shifter); in sarl()
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| /art/test/550-checker-multiply-accumulate/ |
| D | info.txt | 1 Test the merging of instructions into the shifter operand on arm64.
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| /art/test/551-checker-shifter-operand/ |
| D | info.txt | 1 Test the merging of instructions into the shifter operand on arm64.
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| /art/runtime/interpreter/mterp/mips/ |
| D | binop2addr.S | 20 # is second operand zero?
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| D | binopLit16.S | 21 # cmp a1, 0; is second operand zero?
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| D | binop.S | 24 # is second operand zero?
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| D | binopLit8.S | 22 # is second operand zero?
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| /art/runtime/interpreter/mterp/mips64/ |
| D | binop2addr.S | 23 beqz a1, common_errDivideByZero # is second operand zero?
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| D | binopWide2addr.S | 23 beqz a1, common_errDivideByZero # is second operand zero?
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| D | binopLit16.S | 20 beqz a1, common_errDivideByZero # is second operand zero?
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| D | binopLit8.S | 21 beqz a1, common_errDivideByZero # is second operand zero?
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| D | binop.S | 23 beqz a1, common_errDivideByZero # is second operand zero?
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| D | binopWide.S | 23 beqz a1, common_errDivideByZero # is second operand zero?
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| /art/runtime/interpreter/mterp/arm/ |
| D | binopLit16.S | 20 cmp r1, #0 @ is second operand zero?
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| D | op_div_int_2addr.S | 16 cmp r1, #0 @ is second operand zero?
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| D | op_div_int_lit16.S | 16 cmp r1, #0 @ is second operand zero?
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| D | binop2addr.S | 22 cmp r1, #0 @ is second operand zero?
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| D | op_rem_int_2addr.S | 18 cmp r1, #0 @ is second operand zero?
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| D | op_rem_int_lit16.S | 18 cmp r1, #0 @ is second operand zero?
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| D | binopLit8.S | 22 @cmp r1, #0 @ is second operand zero?
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| D | binop.S | 25 cmp r1, #0 @ is second operand zero?
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| D | op_div_int.S | 18 cmp r1, #0 @ is second operand zero?
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| D | op_div_int_lit8.S | 17 @cmp r1, #0 @ is second operand zero?
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| /art/compiler/utils/x86/ |
| D | assembler_x86.cc | 1390 void X86Assembler::shll(Register operand, Register shifter) { in shll() argument
1391 EmitGenericShift(4, Operand(operand), shifter); in shll()
1410 void X86Assembler::shrl(Register operand, Register shifter) { in shrl() argument
1411 EmitGenericShift(5, Operand(operand), shifter); in shrl()
1430 void X86Assembler::sarl(Register operand, Register shifter) { in sarl() argument
1431 EmitGenericShift(7, Operand(operand), shifter); in sarl()
1486 void X86Assembler::roll(Register operand, Register shifter) { in roll() argument
1487 EmitGenericShift(0, Operand(operand), shifter); in roll()
1496 void X86Assembler::rorl(Register operand, Register shifter) { in rorl() argument
1497 EmitGenericShift(1, Operand(operand), shifter); in rorl()
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