| /external/valgrind/none/tests/mips64/ |
| D | logical_instructions.c | 6 AND=0, ANDI, LUI, NOR, enumerator
27 case ANDI: in main()
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| /external/pcre/dist/sljit/ |
| D | sljitNativeMIPS_32.c | 94 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); in emit_single_op()
112 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); in emit_single_op()
316 EMIT_LOGICAL(ANDI, AND); in emit_single_op()
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| D | sljitNativeMIPS_64.c | 181 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); in emit_single_op()
195 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); in emit_single_op()
411 EMIT_LOGICAL(ANDI, AND); in emit_single_op()
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| D | sljitNativePPC_32.c | 174 return push_inst(compiler, ANDI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
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| D | sljitNativeMIPS_common.c | 103 #define ANDI (HI(12)) macro
1386 FAIL_IF(push_inst(compiler, ANDI | SA(EQUAL_FLAG) | TA(EQUAL_FLAG) | IMM(1), EQUAL_FLAG)); in sljit_emit_fop1_cmp()
1394 FAIL_IF(push_inst(compiler, ANDI | SA(ULESS_FLAG) | TA(ULESS_FLAG) | IMM(1), ULESS_FLAG)); in sljit_emit_fop1_cmp()
1397 …FAIL_IF(push_inst(compiler, ANDI | SA(UGREATER_FLAG) | TA(UGREATER_FLAG) | IMM(1), UGREATER_FLAG)); in sljit_emit_fop1_cmp()
2085 FAIL_IF(push_inst(compiler, ANDI | SA(sugg_dst_ar) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar)); in sljit_emit_op_flags()
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| D | sljitNativePPC_64.c | 301 return push_inst(compiler, ANDI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
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| D | sljitNativeARM_T2_32.c | 99 #define ANDI 0xf0000000 macro
617 return push_inst32(compiler, ANDI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm); in emit_op_imm()
2009 ins = (op == SLJIT_AND ? ANDI : (op == SLJIT_OR ? ORRI : EORI)); in sljit_emit_op_flags()
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| D | sljitNativeARM_64.c | 69 #define ANDI 0x92000000 macro
598 return push_inst(compiler, (ANDI ^ inv_bits) | RD(dst) | RN(reg) | inst_bits); in emit_op_imm()
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| D | sljitNativePPC_common.c | 140 #define ANDI (HI(28)) macro
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | p8-scalar_vector_conversions.ll | 681 ; CHECK-DAG: andi. [[ANDI:[0-9]+]], {{[0-9]+}}, 8
682 ; CHECK-DAG: lvsl [[SHMSK:[0-9]+]], 0, [[ANDI]]
715 ; CHECK-DAG: andi. [[ANDI:[0-9]+]], {{[0-9]+}}, 8
716 ; CHECK-DAG: lvsl [[SHMSK:[0-9]+]], 0, [[ANDI]]
1032 ; CHECK-DAG: andi. [[ANDI:[0-9]+]], {{[0-9]+}}, 4
1033 ; CHECK-DAG: sldi [[MUL2:[0-9]+]], [[ANDI]], 1
1068 ; CHECK-DAG: andi. [[ANDI:[0-9]+]], {{[0-9]+}}, 4
1069 ; CHECK-DAG: sldi [[MUL2:[0-9]+]], [[ANDI]], 1
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| /external/v8/src/mips/ |
| D | constants-mips.h | 343 ANDI = ((1U << 3) + 4) << kOpcodeShift, enumerator
895 OpcodeToBitNumber(ANDI) | OpcodeToBitNumber(ORI) |
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| D | disasm-mips.cc | 1536 case ANDI: in DecodeTypeImmediate()
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| D | assembler-mips.cc | 673 return GetOpcodeField(instr) == ANDI; in IsAndImmediate()
1621 GenInstrImmediate(ANDI, rs, rt, j); in andi()
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| D | simulator-mips.cc | 4183 case ANDI: in DecodeTypeImmediate()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 327 ANDI = ((1U << 3) + 4) << kOpcodeShift, enumerator
941 OpcodeToBitNumber(SLTIU) | OpcodeToBitNumber(ANDI) |
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| D | disasm-mips64.cc | 1756 case ANDI: in DecodeTypeImmediate()
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| D | assembler-mips64.cc | 641 return GetOpcodeField(instr) == ANDI; in IsAndImmediate()
1749 GenInstrImmediate(ANDI, rs, rt, j); in andi()
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| D | simulator-mips64.cc | 4404 case ANDI: in DecodeTypeImmediate()
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| /external/valgrind/none/tests/mips32/ |
| D | MIPS32int.stdout.exp-mips32-BE | 81 ANDI
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| D | MIPS32int.stdout.exp-mips32-LE | 81 ANDI
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| D | MIPS32int.stdout.exp-mips32r2-LE | 81 ANDI
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| D | MIPS32int.stdout.exp-mips32r2-BE | 81 ANDI
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| /external/icu/icu4j/perf-tests/data/collation/ |
| D | TestNames_SerbianSH.txt | 6169 ANDIĆ SVETOZAR
6170 ANDIĆ VLADIMIR
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