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Searched refs:ASR (Results 1 – 25 of 70) sorted by relevance

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/external/tremolo/Tremolo/
DmdctLARM.s63 MOV r5, r5, ASR #9 @ r5 = (*--r)>>9
64 MOV r6, r6, ASR #9 @ r6 = (*--r)>>9
65 MOV r7, r7, ASR #9 @ r7 = (*--r)>>9
66 MOV r12,r12,ASR #9 @ r12= (*--r)>>9
68 MOV r14,r12,ASR #15
69 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
70 EORNE r12,r4, r14,ASR #31
73 MOV r14,r7, ASR #15
74 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
75 EORNE r7, r4, r14,ASR #31
[all …]
DmdctARM.s65 MOV r5, r5, ASR #9 @ r5 = (*--r)>>9
66 MOV r6, r6, ASR #9 @ r6 = (*--r)>>9
67 MOV r7, r7, ASR #9 @ r7 = (*--r)>>9
68 MOV r12,r12,ASR #9 @ r12= (*--r)>>9
70 MOV r14,r12,ASR #15
71 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
72 EORNE r12,r4, r14,ASR #31
75 MOV r14,r7, ASR #15
76 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
77 EORNE r7, r4, r14,ASR #31
[all …]
Ddpen.s264 MOVGT r14,r14,ASR r11 @ r14= add = s->q_min >> add (if add >0)
301 ADD r1, r11,r1, ASR r5 @ r1 = v = prev+((add+mul*v)>>shiftM)
332 ADD r2, r11,r2, ASR r5 @ r2 = v = prev+(add+mul*v)>>shiftM
346 ADD r2, r11,r2, ASR r5 @ r2 = v = prev+(add+mul*v)>>shiftM
375 ADD r2, r11,r2, ASR r5 @ r2 = v = prev+(add+mul*v)>>shiftM
386 ADD r2, r11,r2, ASR r5 @ r2 = v = prev+(add+mul*v)>>shiftM
Dfloor1LARM.s56 MOV r4, r4, ASR #6
/external/aac/libSBRdec/src/arm/
Denv_calc_arm.cpp118 MOVS r3, r3, ASR #1 in FDK_get_maxval()
126 EOR r4, r4, r4, ASR #31 in FDK_get_maxval()
127 EOR r5, r5, r5, ASR #31 in FDK_get_maxval()
134 EOR r4, r4, r4, ASR #31 in FDK_get_maxval()
135 EOR r5, r5, r5, ASR #31 in FDK_get_maxval()
/external/sonivox/arm-wt-22k/lib_src/
DARM-E_voice_gain_gnu.s96 MOV gainLeft, gainLeft, ASR #(NUM_MIXER_GUARD_BITS - 2)
97 MOV gainIncLeft, gainIncLeft, ASR #(SYNTH_UPDATE_PERIOD_IN_BITS + NUM_MIXER_GUARD_BITS - 2)
104 MOV gainRight, gainRight, ASR #(NUM_MIXER_GUARD_BITS - 2)
105 MOV gainIncRight, gainIncRight, ASR #(SYNTH_UPDATE_PERIOD_IN_BITS + NUM_MIXER_GUARD_BITS - 2)
142 MOV gainIncrement, gainIncrement, ASR #SYNTH_UPDATE_PERIOD_IN_BITS
152 MOV tmp0, tmp0, ASR #1 @ add 6dB headroom
DARM-E_filter_gnu.s81 MOV b2, b2, ASR #1 @ b2 = b2 >> 1
82 MOV K, K, ASR #1 @ K = K >> 1
100 MOV z1, tmp0, ASR #14 @ shift result to low word
113 MOV z1, tmp1, ASR #14 @ shift result to low word
DARM-E_interpolate_noloop_gnu.s99 MOV tmp0, tmp0, ASR #2 @ reduce 16-bit signal by 12dB
102 ADD tmp1, tmp0, tmp1, ASR #(NUM_EG1_FRAC_BITS-6) @ tmp1 = tmp0 + (tmp1 >> (15-6))
DARM-E_interpolate_loop_gnu.s107 MOV tmp0, tmp0, ASR #2 @ reduce 16-bit signal by 12dB
110 ADD tmp1, tmp0, tmp1, ASR #(NUM_EG1_FRAC_BITS-6) @ tmp1 = tmp0 + (tmp1 >> (15-6))
/external/v8/test/cctest/
Dtest-disasm-arm.cc140 COMPARE(add(r7, r8, Operand(ip, ASR, 1)), in TEST()
142 COMPARE(add(r7, r8, Operand(ip, ASR, 0)), in TEST()
146 COMPARE(add(r7, r8, Operand(ip, ASR, 31), SetCC, vs), in TEST()
149 COMPARE(adc(r7, fp, Operand(ip, ASR, 5)), in TEST()
151 COMPARE(adc(r4, ip, Operand(ip, ASR, 1), LeaveCC, vc), in TEST()
155 COMPARE(adc(r8, lr, Operand(ip, ASR, 31), SetCC, vc), in TEST()
176 COMPARE(tst(r7, Operand(r5, ASR, ip), ge), in TEST()
178 COMPARE(tst(r7, Operand(r6, ASR, sp)), in TEST()
182 COMPARE(tst(r7, Operand(r8, ASR, fp), ge), in TEST()
200 COMPARE(cmp(r7, Operand(r8, ASR, 19)), in TEST()
[all …]
Dtest-disasm-arm64.cc153 COMPARE(Mov(x8, Operand(x9, ASR, 42)), "asr x8, x9, #42"); in TEST_()
173 COMPARE(Mvn(x8, Operand(x9, ASR, 63)), "mvn x8, x9, asr #63"); in TEST_()
339 COMPARE(add(w18, w19, Operand(w20, ASR, 5)), "add w18, w19, w20, asr #5"); in TEST_()
340 COMPARE(add(x21, x22, Operand(x23, ASR, 6)), "add x21, x22, x23, asr #6"); in TEST_()
365 COMPARE(sub(w18, w19, Operand(w20, ASR, 5)), "sub w18, w19, w20, asr #5"); in TEST_()
366 COMPARE(sub(x21, x22, Operand(x23, ASR, 6)), "sub x21, x22, x23, asr #6"); in TEST_()
372 COMPARE(negs(x3, Operand(x4, ASR, 61)), "negs x3, x4, asr #61"); in TEST_()
715 COMPARE(and_(x9, x10, Operand(x11, ASR, 3)), "and x9, x10, x11, asr #3"); in TEST_()
721 COMPARE(bic(x24, x25, Operand(x26, ASR, 7)), "bic x24, x25, x26, asr #7"); in TEST_()
727 COMPARE(orr(x9, x10, Operand(x11, ASR, 11)), "orr x9, x10, x11, asr #11"); in TEST_()
[all …]
Dtest-assembler-ppc.cc428 __ usat(r2, 12, Operand(r0, ASR, 9)); // Sat (0xFFFF>>9) to 0-4095 = 0x7F.
1000 __ mov(r1, Operand(r1, ASR, 1), SetCC);
1005 __ mov(r2, Operand(r2, ASR, 1), SetCC);
1012 __ mov(r3, Operand(r1, ASR, 1), SetCC); // Set the carry.
1018 __ mov(r3, Operand(r2, ASR, 1), SetCC); // Unset the carry.
Dtest-assembler-arm.cc182 __ mov(r2, Operand(r0, ASR, 1));
190 __ mov(r2, Operand(r2, ASR, 3));
408 __ usat(r2, 12, Operand(r0, ASR, 9)); // Sat (0xFFFF>>9) to 0-4095 = 0x7F.
959 __ mov(r1, Operand(r1, ASR, 1), SetCC);
964 __ mov(r2, Operand(r2, ASR, 1), SetCC);
971 __ mov(r3, Operand(r1, ASR, 1), SetCC); // Set the carry.
977 __ mov(r3, Operand(r2, ASR, 1), SetCC); // Unset the carry.
1380 __ pkhtb(r2, r0, Operand(r1, ASR, 8));
Dtest-assembler-arm64.cc303 __ Mvn(w6, Operand(w0, ASR, 11)); in TEST()
304 __ Mvn(x7, Operand(x1, ASR, 12)); in TEST()
376 __ Mov(w19, Operand(w11, ASR, 11)); in TEST()
377 __ Mov(x20, Operand(x12, ASR, 12)); in TEST()
532 __ Orr(w6, w0, Operand(w1, ASR, 4)); in TEST()
533 __ Orr(x7, x0, Operand(x1, ASR, 4)); in TEST()
629 __ Orn(w6, w0, Operand(w1, ASR, 1)); in TEST()
630 __ Orn(x7, x0, Operand(x1, ASR, 1)); in TEST()
698 __ And(w6, w0, Operand(w1, ASR, 20)); in TEST()
699 __ And(x7, x0, Operand(x1, ASR, 20)); in TEST()
[all …]
/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64AddressingModes.h36 ASR, enumerator
57 case AArch64_AM::ASR: return "asr"; in getShiftExtendName()
78 case 2: return AArch64_AM::ASR; in getShiftType()
106 case AArch64_AM::ASR: STEnc = 2; break; in getShifterImm()
/external/llvm/test/Transforms/InstCombine/
Didioms.ll4 ; simplified into a single ASR operation:
/external/boringssl/src/crypto/curve25519/asm/
Dx25519-asm-arm.S2034 mov r11,r11,ASR #25
2036 mov r11,r11,ASR #26
2038 mov r11,r11,ASR #25
2040 mov r11,r11,ASR #26
2042 mov r11,r11,ASR #25
2044 mov r11,r11,ASR #26
2046 mov r11,r11,ASR #25
2048 mov r11,r11,ASR #26
2050 mov r11,r11,ASR #25
2052 mov r11,r11,ASR #26
[all …]
/external/libmpeg2/common/armv8/
Dicv_variance_av8.s117 ASR x0, x0, #10
/external/libmpeg2/common/arm/
Dicv_variance_a9.s119 mov r0, r0, ASR #10
/external/llvm/test/MC/Disassembler/ARM/
Dthumb1.txt65 # ASR (immediate)
76 # ASR (register)
/external/v8/src/regexp/arm64/
Dregexp-macro-assembler-arm64.cc879 __ Add(capture_start, input_length, Operand(capture_start, ASR, 1)); in GetCode()
880 __ Add(capture_end, input_length, Operand(capture_end, ASR, 1)); in GetCode()
918 Operand(capture_start, ASR, 1)); in GetCode()
919 __ Add(capture_end, input_length, Operand(capture_end, ASR, 1)); in GetCode()
947 __ Add(capture_start, input_length, Operand(capture_start, ASR, 1)); in GetCode()
948 __ Add(capture_end, input_length, Operand(capture_end, ASR, 1)); in GetCode()
/external/libavc/encoder/arm/
Dih264e_fmt_conv.s266 @ SUB r10,r10,r7,ASR #1 ;// u2_offset3 = u4_stride_v - u4_width >> 1
/external/v8/src/arm64/
Dassembler-arm64-inl.h442 return Operand(smi, ASR, kSmiShift);
454 return Operand(smi, ASR, kSmiShift - scale);
1109 DCHECK(shift == LSL || shift == LSR || shift == ASR || shift == ROR);
/external/llvm/test/MC/ARM/
Dbasic-thumb-instructions.s102 @ ASR (immediate)
120 @ ASR (register)
/external/v8/src/arm/
Dconstants-arm.h243 ASR = 2 << 5, // Arithmetic shift right. enumerator

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