/external/llvm/test/CodeGen/CPP/ |
D | atomic.ll | 20 … [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::And, {{.*}}, AcquireRelease, CrossThread 71 …; CHECK: AtomicCmpXchgInst* [[INST:[a-zA-Z0-9_]+]] = new AtomicCmpXchgInst({{.*}}, AcquireRelease,… 83 …; CHECK: AtomicCmpXchgInst* [[INST:[a-zA-Z0-9_]+]] = new AtomicCmpXchgInst({{.*}}, AcquireRelease,…
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/external/llvm/lib/Transforms/Utils/ |
D | GlobalStatus.cpp | 24 return AcquireRelease; in strongerOrdering() 26 return AcquireRelease; in strongerOrdering()
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/external/compiler-rt/lib/tsan/tests/unit/ |
D | tsan_clock_test.cc | 56 TEST(Clock, AcquireRelease) { in TEST() argument
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/external/clang/lib/CodeGen/ |
D | CGAtomic.cpp | 300 case llvm::AcquireRelease: in translateAtomicOrdering() 1063 Size, llvm::AcquireRelease); in EmitAtomicExpr() 1131 Size, llvm::AcquireRelease); in EmitAtomicExpr()
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D | CGBuiltin.cpp | 1341 llvm::AcquireRelease); in EmitBuiltinExpr() 1364 llvm::AcquireRelease, llvm::SequentiallyConsistent in EmitBuiltinExpr() 1475 Builder.CreateFence(llvm::AcquireRelease, Scope); in EmitBuiltinExpr() 1506 Builder.CreateFence(llvm::AcquireRelease, Scope); in EmitBuiltinExpr()
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/external/llvm/lib/Transforms/Instrumentation/ |
D | ThreadSanitizer.cpp | 465 case AcquireRelease: v = 4; break; in createOrdering()
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D | MemorySanitizer.cpp | 1220 case AcquireRelease: in addReleaseOrdering() 1221 return AcquireRelease; in addReleaseOrdering() 1237 case AcquireRelease: in addAcquireOrdering() 1238 return AcquireRelease; in addAcquireOrdering()
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/external/llvm/docs/ |
D | Atomics.rst | 306 AcquireRelease section in Atomic orderings 309 AcquireRelease (``acq_rel`` in IR) provides both an Acquire and a Release
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/external/llvm/include/llvm/IR/ |
D | Instructions.h | 46 AcquireRelease = 6, enumerator 59 Ord == AcquireRelease || in isAtLeastAcquire() 67 Ord == AcquireRelease || in isAtLeastRelease() 641 case AcquireRelease:
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrAtomics.td | 115 assert(Ordering != AcquireRelease && "unexpected store ordering");
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/external/llvm/lib/IR/ |
D | Verifier.cpp | 2756 Assert(LI.getOrdering() != Release && LI.getOrdering() != AcquireRelease, in visitLoadInst() 2783 Assert(SI.getOrdering() != Acquire && SI.getOrdering() != AcquireRelease, in visitStoreInst() 2831 CXI.getFailureOrdering() != AcquireRelease, in visitAtomicCmpXchgInst() 2871 Ordering == AcquireRelease || Ordering == SequentiallyConsistent, in visitFenceInst()
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D | AsmWriter.cpp | 2112 case AcquireRelease: Out << " acq_rel"; break; in writeAtomic() 2133 case AcquireRelease: Out << " acq_rel"; break; in writeAtomicCmpXchg() 2143 case AcquireRelease: Out << " acq_rel"; break; in writeAtomicCmpXchg()
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D | Core.cpp | 2515 case LLVMAtomicOrderingAcquireRelease: return AcquireRelease; in mapFromLLVMOrdering() 2530 case AcquireRelease: return LLVMAtomicOrderingAcquireRelease; in mapToLLVMOrdering()
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D | Instructions.cpp | 1408 assert(FailureOrdering != Release && FailureOrdering != AcquireRelease && in Init()
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/external/llvm/lib/AsmParser/ |
D | LLParser.cpp | 1738 case lltok::kw_acq_rel: Ordering = AcquireRelease; break; in ParseOrdering() 5810 if (Ordering == Release || Ordering == AcquireRelease) in ParseLoad() 5860 if (Ordering == Acquire || Ordering == AcquireRelease) in ParseStore() 5898 if (FailureOrdering == Release || FailureOrdering == AcquireRelease) in ParseCmpXchg()
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/external/llvm/lib/Bitcode/Reader/ |
D | BitcodeReader.cpp | 799 case bitc::ORDERING_ACQREL: return AcquireRelease; in getDecodedOrdering() 4875 Ordering == AcquireRelease) in parseFunctionBody() 4931 Ordering == AcquireRelease) in parseFunctionBody()
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/external/llvm/lib/Target/CppBackend/ |
D | CPPBackend.cpp | 1099 case AcquireRelease: return "AcquireRelease"; in ConvertAtomicOrdering()
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/external/llvm/lib/Bitcode/Writer/ |
D | BitcodeWriter.cpp | 134 case AcquireRelease: return bitc::ORDERING_ACQREL; in GetEncodedOrdering()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 11886 case AcquireRelease: in emitLeadingFence() 11910 case AcquireRelease: in emitTrailingFence()
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