| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 667 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectLdStSOReg() local
669 AddSub = ARM_AM::sub; in SelectLdStSOReg()
675 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg()
698 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; in SelectLdStSOReg() local
759 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectLdStSOReg()
778 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode2Worker() local
780 AddSub = ARM_AM::sub; in SelectAddrMode2Worker()
786 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectAddrMode2Worker()
827 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode2Worker() local
829 AddSub = ARM_AM::sub; in SelectAddrMode2Worker()
[all …]
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| D | ARMLoadStoreOptimizer.cpp | 1317 ARM_AM::AddrOpc AddSub = Offset < 0 ? ARM_AM::sub : ARM_AM::add; in MergeBaseUpdateLoadStore() local
1340 int Imm = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
1357 int Imm = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
2061 ARM_AM::AddrOpc AddSub = ARM_AM::add; in CanFormLdStDWord() local
2063 AddSub = ARM_AM::sub; in CanFormLdStDWord()
2069 Offset = ARM_AM::getAM3Opc(AddSub, OffImm); in CanFormLdStDWord()
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| /external/v8/test/unittests/compiler/arm64/ |
| D | instruction-selector-arm64-unittest.cc | 127 struct AddSub { struct
133 std::ostream& operator<<(std::ostream& os, const AddSub& op) { in operator <<()
138 const AddSub kAddSubInstructions[] = {
434 typedef InstructionSelectorTestWithParam<AddSub> InstructionSelectorAddSubTest;
438 const AddSub dpi = GetParam(); in TEST_P()
451 const AddSub dpi = GetParam(); in TEST_P()
469 const AddSub dpi = GetParam(); in TEST_P()
488 const AddSub dpi = GetParam(); in TEST_P()
519 const AddSub dpi = GetParam(); in TEST_P()
534 const AddSub dpi = GetParam(); in TEST_P()
[all …]
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 1094 AddSub(rd, rn, operand, LeaveFlags, ADD); in add()
1101 AddSub(rd, rn, operand, SetFlags, ADD); in adds()
1115 AddSub(rd, rn, operand, LeaveFlags, SUB); in sub()
1122 AddSub(rd, rn, operand, SetFlags, SUB); in subs()
2169 void Assembler::AddSub(const Register& rd, in AddSub() function in v8::internal::Assembler
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| D | macro-assembler-arm64.cc | 500 AddSub(rd, rn, imm_operand, S, op); in AddSubMacro()
503 AddSub(rd, rn, temp, S, op); in AddSubMacro()
506 AddSub(rd, rn, operand, S, op); in AddSubMacro()
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| D | assembler-arm64.h | 1877 void AddSub(const Register& rd,
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.cc | 1401 AddSub(rd, rn, imm_operand, S, op); in AddSubMacro()
1404 AddSub(rd, rn, temp, S, op); in AddSubMacro()
1407 AddSub(rd, rn, operand, S, op); in AddSubMacro()
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| D | assembler-a64.cc | 897 AddSub(rd, rn, operand, LeaveFlags, ADD); in add()
904 AddSub(rd, rn, operand, SetFlags, ADD); in adds()
918 AddSub(rd, rn, operand, LeaveFlags, SUB); in sub()
925 AddSub(rd, rn, operand, SetFlags, SUB); in subs()
4607 void Assembler::AddSub(const Register& rd, in AddSub() function in vixl::Assembler
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| D | assembler-a64.h | 4331 void AddSub(const Register& rd,
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 2045 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode2Operands() local
2049 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAddrMode2Operands()
2066 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM2OffsetImmOperands() local
2070 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAM2OffsetImmOperands()
2089 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode3Operands() local
2093 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAddrMode3Operands()
2117 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM3OffsetOperands() local
2121 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAM3OffsetOperands()
2139 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5Operands() local
2143 Val = ARM_AM::getAM5Opc(AddSub, Val); in addAddrMode5Operands()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 601 defm ADD : AddSub<0, "add", "sub", add>;
602 defm SUB : AddSub<1, "sub", "add">;
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| D | AArch64InstrFormats.td | 1736 multiclass AddSub<bit isSub, string mnemonic, string alias,
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 6304 if (SDValue AddSub = LowerToAddSub(BV, Subtarget, DAG)) in LowerBUILD_VECTOR() local
6305 return AddSub; in LowerBUILD_VECTOR()
23532 if (SDValue AddSub = combineShuffleToAddSub(N, DAG)) in PerformShuffleCombine() local
23533 return AddSub; in PerformShuffleCombine()
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