| /external/v8/src/mips/ |
| D | constants-mips.cc | 137 case BGTZ: // POP07 bltuc/bgtuc, bgtzalc, bltzalc in IsForbiddenAfterBranchInstr()
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| D | constants-mips.h | 337 BGTZ = ((0U << 3) + 7) << kOpcodeShift, enumerator
389 POP07 = BGTZ, // bltuc/bgtuc, bgtzalc, bltzalc
892 OpcodeToBitNumber(BGTZ) | OpcodeToBitNumber(ADDI) |
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| D | assembler-mips.cc | 466 opcode == BEQ || opcode == BNE || opcode == BLEZ || opcode == BGTZ || in IsBranch()
1261 GenInstrImmediate(BGTZ, rs, zero_reg, offset); in bgtz()
1301 GenInstrImmediate(BGTZ, rs, rt, offset, CompactBranchType::COMPACT_BRANCH); in bltuc()
1390 GenInstrImmediate(BGTZ, rt, rt, offset, CompactBranchType::COMPACT_BRANCH); in bltzalc()
1398 GenInstrImmediate(BGTZ, zero_reg, rt, offset, in bgtzalc()
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| D | disasm-mips.cc | 1439 case BGTZ: in DecodeTypeImmediate()
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| /external/v8/src/mips64/ |
| D | constants-mips64.cc | 137 case BGTZ: // POP07 bltuc/bgtuc, bgtzalc, bltzalc in IsForbiddenAfterBranchInstr()
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| D | constants-mips64.h | 321 BGTZ = ((0U << 3) + 7) << kOpcodeShift, enumerator
385 POP07 = BGTZ, // bltuc/bgtuc, bgtzalc, bltzalc
938 OpcodeToBitNumber(BGTZ) | OpcodeToBitNumber(ADDI) |
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| D | assembler-mips64.cc | 440 opcode == BEQ || opcode == BNE || opcode == BLEZ || opcode == BGTZ || in IsBranch()
1297 GenInstrImmediate(BGTZ, rs, zero_reg, offset); in bgtz()
1337 GenInstrImmediate(BGTZ, rs, rt, offset, CompactBranchType::COMPACT_BRANCH); in bltuc()
1420 GenInstrImmediate(BGTZ, rt, rt, offset, CompactBranchType::COMPACT_BRANCH); in bltzalc()
1428 GenInstrImmediate(BGTZ, zero_reg, rt, offset, in bgtzalc()
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| D | disasm-mips64.cc | 1652 case BGTZ: in DecodeTypeImmediate()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 409 case Mips::BGTZ: return Mips::BLEZ; in getOppositeBranchOpc()
412 case Mips::BLEZ: return Mips::BGTZ; in getOppositeBranchOpc()
491 return (Opc == Mips::BEQ || Opc == Mips::BNE || Opc == Mips::BGTZ || in getAnalyzableBrOpc()
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| D | MipsFastISel.cpp | 916 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::BGTZ)) in selectBranch()
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| D | MipsInstrInfo.td | 1521 def BGTZ : MMRel, CBranchZero<"bgtz", brtarget, setgt, GPR32Opnd>,
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| /external/pcre/dist/sljit/ |
| D | sljitNativeMIPS_common.c | 110 #define BGTZ (HI(7)) macro
1784 inst = BGTZ; in sljit_emit_cmp()
1814 inst = BGTZ; in sljit_emit_cmp()
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| /external/valgrind/none/tests/mips32/ |
| D | branches.stdout.exp | 144 BGTZ
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1548 case Mips::BGTZ: in processInstruction()
2746 ZeroSrcOpcode = Mips::BGTZ; in expandCondBranches()
2780 ZeroTrgOpcode = Mips::BGTZ; in expandCondBranches()
2810 emitRX(Mips::BGTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), IDLoc, in expandCondBranches()
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| /external/valgrind/none/tests/mips64/ |
| D | branches.stdout.exp | 144 --- BGTZ --- if RSval > 0 then out = RDval + 1 else out = RDval + 6
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| D | branch_and_jump_instructions.stdout.exp | 566 --- BGTZ --- if RSval > 0 then out = RDval + 1 else out = RDval + 9
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 737 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
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