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Searched refs:ComplexPattern (Results 1 – 25 of 41) sorted by relevance

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/external/llvm/utils/TableGen/
DCodeGenTarget.h198 class ComplexPattern {
205 ComplexPattern() : NumOperands(0) {} in ComplexPattern() function
206 ComplexPattern(Record *R);
DDAGISelMatcherEmitter.cpp48 DenseMap<const ComplexPattern*, unsigned> ComplexPatternMap;
49 std::vector<const ComplexPattern*> ComplexPatterns;
99 unsigned getComplexPat(const ComplexPattern &P) { in getComplexPat()
419 const ComplexPattern &Pattern = CCPM->getPattern(); in EmitMatcher()
677 const ComplexPattern &P = *ComplexPatterns[i]; in EmitPredicateFunctions()
DCodeGenDAGPatterns.h37 class ComplexPattern; variable
429 const ComplexPattern *
724 std::map<Record*, ComplexPattern, LessRecordByID> ComplexPatterns;
764 const ComplexPattern &getComplexPattern(Record *R) const { in getComplexPattern()
DDAGISelMatcher.h25 class ComplexPattern; variable
719 const ComplexPattern &Pattern;
732 CheckComplexPatMatcher(const ComplexPattern &pattern, unsigned matchnumber, in CheckComplexPatMatcher()
737 const ComplexPattern &getPattern() const { return Pattern; } in getPattern()
DCodeGenTarget.cpp395 ComplexPattern::ComplexPattern(Record *R) { in ComplexPattern() function in ComplexPattern
DDAGISelMatcherGen.cpp507 if (const ComplexPattern *CP = in EmitMatcherCode()
547 const ComplexPattern &CP = *N->getComplexPatternInfo(CGP); in EmitMatcherCode()
DCodeGenDAGPatterns.cpp828 const ComplexPattern *AM = P->getComplexPatternInfo(CGP); in getPatternSize()
1596 const ComplexPattern *
1614 if (const ComplexPattern *CP = getComplexPatternInfo(CGP)) in getNumMIResults()
1635 if (const ComplexPattern *CP = getComplexPatternInfo(CGP)) in NodeHasProperty()
2792 const ComplexPattern &CP = CDP.getComplexPattern(LeafRec); in AnalyzeNode()
3218 if (const ComplexPattern *CP = in AddPatternToMatch()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILInstrInfo.td156 def ADDR : ComplexPattern<i32, 2, "SelectADDR", [], []>;
157 def ADDRF : ComplexPattern<i32, 2, "SelectADDR", [frameindex], []>;
158 def ADDR64 : ComplexPattern<i64, 2, "SelectADDR64", [], []>;
159 def ADDR64F : ComplexPattern<i64, 2, "SelectADDR64", [frameindex], []>;
DSIInstrInfo.td109 def ADDR_Reg : ComplexPattern<i64, 2, "SelectADDRReg", [], []>;
110 def ADDR_Offset8 : ComplexPattern<i64, 2, "SelectADDR8BitOffset", [], []>;
DR600Instructions.td59 def ADDRParam : ComplexPattern<i32, 2, "SelectADDRParam", [], []>;
60 def ADDRDWord : ComplexPattern<i32, 1, "SelectADDRDWord", [], []>;
61 def ADDRVTX_READ : ComplexPattern<i32, 2, "SelectADDRVTX_READ", [], []>;
/external/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td1 def addrimm12 : ComplexPattern<iPTR, 2, "selectIntAddrMM", [frameindex]>;
2 def addrimm4lsl2 : ComplexPattern<iPTR, 2, "selectIntAddrLSL2MM", [frameindex]>;
244 ComplexPattern Addr = addr> :
252 ComplexPattern Addr = addr> :
541 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
549 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
558 ComplexPattern Addr = addr> :
567 ComplexPattern Addr = addr> :
DMipsInstrInfo.td766 ComplexPattern<iPTR, 2, "selectIntAddr", [frameindex]>;
769 ComplexPattern<iPTR, 2, "selectAddrRegImm", [frameindex]>;
772 ComplexPattern<iPTR, 2, "selectAddrRegReg", [frameindex]>;
775 ComplexPattern<iPTR, 2, "selectAddrDefault", [frameindex]>;
777 def addrimm10 : ComplexPattern<iPTR, 2, "selectIntAddrMSA", [frameindex]>;
853 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
863 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
871 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
1652 // add op with mem ComplexPattern is used and the stack address copy
DMipsMSAInstrInfo.td259 ComplexPattern<ty, numops, fn, roots, props> {
329 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
334 def vsplat_uimm_inv_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmInvPow2",
350 // FIXME: These should be a ComplexPattern but we can't use them because the
1133 ComplexPattern Imm, RegisterOperand ROWD,
1144 ComplexPattern Imm, RegisterOperand ROWD,
1155 ComplexPattern Imm, RegisterOperand ROWD,
1166 ComplexPattern Imm, RegisterOperand ROWD,
1188 ComplexPattern Mask, RegisterOperand ROWD,
2305 Operand MemOpnd = mem_msa, ComplexPattern Addr = addrimm10,
[all …]
DMicroMips32r6InstrInfo.td517 ComplexPattern Addr = addr> :
889 ComplexPattern Addr = addr;
900 ComplexPattern Addr = addr;
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.td567 def DS1Addr1Offset : ComplexPattern<i32, 2, "SelectDS1Addr1Offset">;
568 def DS64Bit4ByteAligned : ComplexPattern<i32, 3, "SelectDS64Bit4ByteAligned">;
570 def MUBUFAddr32 : ComplexPattern<i64, 9, "SelectMUBUFAddr32">;
571 def MUBUFAddr64 : ComplexPattern<i64, 7, "SelectMUBUFAddr64">;
572 def MUBUFAddr64Atomic : ComplexPattern<i64, 5, "SelectMUBUFAddr64">;
573 def MUBUFScratch : ComplexPattern<i64, 4, "SelectMUBUFScratch">;
574 def MUBUFOffset : ComplexPattern<i64, 6, "SelectMUBUFOffset">;
575 def MUBUFOffsetAtomic : ComplexPattern<i64, 4, "SelectMUBUFOffset">;
577 def SMRDImm : ComplexPattern<i64, 2, "SelectSMRDImm">;
578 def SMRDImm32 : ComplexPattern<i64, 2, "SelectSMRDImm32">;
[all …]
DR600Instructions.td74 def ADDRParam : ComplexPattern<i32, 2, "SelectADDRParam", [], []>;
75 def ADDRDWord : ComplexPattern<i32, 1, "SelectADDRDWord", [], []>;
76 def ADDRVTX_READ : ComplexPattern<i32, 2, "SelectADDRVTX_READ", [], []>;
77 def ADDRGA_CONST_OFFSET : ComplexPattern<i32, 1, "SelectGlobalValueConstantOffset", [], []>;
78 def ADDRGA_VAR_OFFSET : ComplexPattern<i32, 2, "SelectGlobalValueVariableOffset", [], []>;
DAMDGPUInstructions.td42 def ADDRIndirect : ComplexPattern<iPTR, 2, "SelectADDRIndirect", [], []>;
476 ComplexPattern addrPat> {
/external/llvm/lib/Target/ARM/
DARMInstrThumb.td158 ComplexPattern<i32, 2, "SelectThumbAddrModeRR", []> {
174 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S1", []> {
182 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S2", []> {
190 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S4", []> {
202 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S4", []> {
214 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S2", []> {
226 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S1", []> {
240 ComplexPattern<i32, 2, "SelectThumbAddrModeSP", []> {
DARMInstrInfo.td533 ComplexPattern<i32, 3, "SelectRegShifterOperand",
544 ComplexPattern<i32, 2, "SelectImmShifterOperand",
555 ComplexPattern<i32, 3, "SelectShiftRegShifterOperand",
566 ComplexPattern<i32, 2, "SelectShiftImmShifterOperand",
808 ComplexPattern<i32, 2, "SelectAddrModeImm12", []> {
831 ComplexPattern<i32, 3, "SelectLdStSOReg", []> {
887 ComplexPattern<i32, 3, "SelectAddrMode2", []> {
899 ComplexPattern<i32, 2, "SelectAddrMode2OffsetReg",
912 ComplexPattern<i32, 2, "SelectAddrMode2OffsetImm",
927 ComplexPattern<i32, 3, "SelectAddrMode3", []> {
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/external/llvm/lib/Target/Hexagon/
DHexagonOperands.td562 def AddrFI : ComplexPattern<i32, 1, "SelectAddrFI", [frameindex], []>;
567 def AddrGA : ComplexPattern<i32, 1, "SelectAddrGA", [], []>;
568 def AddrGP : ComplexPattern<i32, 1, "SelectAddrGP", [], []>;
/external/llvm/lib/Target/AArch64/
DAArch64InstrFormats.td251 def am_indexed7s8 : ComplexPattern<i64, 2, "SelectAddrModeIndexed7S8", []>;
252 def am_indexed7s16 : ComplexPattern<i64, 2, "SelectAddrModeIndexed7S16", []>;
253 def am_indexed7s32 : ComplexPattern<i64, 2, "SelectAddrModeIndexed7S32", []>;
254 def am_indexed7s64 : ComplexPattern<i64, 2, "SelectAddrModeIndexed7S64", []>;
255 def am_indexed7s128 : ComplexPattern<i64, 2, "SelectAddrModeIndexed7S128", []>;
341 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<32>", [fpimm, ld]> {
349 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<64>", [fpimm, ld]> {
586 ComplexPattern<Ty, 2, "SelectArithShiftedRegister", []> {
608 ComplexPattern<Ty, 2, "SelectLogicalShiftedRegister", []> {
657 : Operand<Ty>, ComplexPattern<Ty, 2, "SelectArithImmed", [imm]> {
[all …]
/external/llvm/lib/Target/BPF/
DBPFInstrInfo.td57 def ADDRri : ComplexPattern<i64, 2, "SelectAddr", [], []>;
58 def FIri : ComplexPattern<i64, 2, "SelectFIAddr", [add, or], []>;
/external/llvm/lib/Target/SystemZ/
DSystemZOperands.td63 : ComplexPattern<vt, 1, "selectPCRelAddress",
109 : ComplexPattern<!cast<ValueType>("i"##bitsize), numops,
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td298 def SDNPWantRoot : SDNodeProperty; // ComplexPattern gets the root of match
299 def SDNPWantParent : SDNodeProperty; // ComplexPattern gets the parent
1141 // e.g. X86 addressing mode - def addr : ComplexPattern<4, "SelectAddr", [add]>;
1143 class ComplexPattern<ValueType ty, int numops, string fn,
/external/llvm/lib/Target/X86/
DX86InstrInfo.td701 def addr : ComplexPattern<iPTR, 5, "selectAddr", [], [SDNPWantParent]>;
702 def lea32addr : ComplexPattern<i32, 5, "selectLEAAddr",
706 def lea64_32addr : ComplexPattern<i32, 5, "selectLEA64_32Addr",
711 def tls32addr : ComplexPattern<i32, 5, "selectTLSADDRAddr",
714 def tls32baseaddr : ComplexPattern<i32, 5, "selectTLSADDRAddr",
717 def lea64addr : ComplexPattern<i64, 5, "selectLEAAddr",
721 def tls64addr : ComplexPattern<i64, 5, "selectTLSADDRAddr",
724 def tls64baseaddr : ComplexPattern<i64, 5, "selectTLSADDRAddr",
727 def vectoraddr : ComplexPattern<iPTR, 5, "selectVectorAddr", [],[SDNPWantParent]>;

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