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Searched refs:CountLeadingZeros (Results 1 – 14 of 14) sorted by relevance

/external/v8/src/arm64/
Dutils-arm64.cc16 int CountLeadingZeros(uint64_t value, int width) { in CountLeadingZeros() function
33 return CountLeadingZeros(value, width) - 1; in CountLeadingSignBits()
35 return CountLeadingZeros(~value, width) - 1; in CountLeadingSignBits()
Dutils-arm64.h49 int CountLeadingZeros(uint64_t value, int width);
Dassembler-arm64.cc92 int index = CountLeadingZeros(list_, kRegListSizeInBits); in PopHighestIndex()
2652 clz_a = CountLeadingZeros(a, kXRegSizeInBits); in IsImmLogical()
2653 int clz_c = CountLeadingZeros(c, kXRegSizeInBits); in IsImmLogical()
2674 clz_a = CountLeadingZeros(a, kXRegSizeInBits); in IsImmLogical()
2707 int multiplier_idx = CountLeadingZeros(d, kXRegSizeInBits) - 57; in IsImmLogical()
2726 int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSizeInBits); in IsImmLogical()
Dsimulator-arm64.cc1989 case CLZ_w: set_wreg(dst, CountLeadingZeros(wreg(src), kWRegSizeInBits)); in VisitDataProcessing1Source()
1991 case CLZ_x: set_xreg(dst, CountLeadingZeros(xreg(src), kXRegSizeInBits)); in VisitDataProcessing1Source()
2592 const int highest_significant_bit = 63 - CountLeadingZeros(mantissa, 64); in FPRound()
2696 const int highest_significant_bit = 63 - CountLeadingZeros(src, 64); in UFixedToDouble()
2722 const int highest_significant_bit = 63 - CountLeadingZeros(src, 64); in UFixedToFloat()
Dmacro-assembler-arm64.cc455 int shift_high = CountLeadingZeros(imm, reg_size); in MoveImmediateForShiftedOp()
/external/vixl/src/vixl/
Dcompiler-intrinsics.cc35 return CountLeadingZeros(value, width) - 1; in CountLeadingSignBitsFallBack()
37 return CountLeadingZeros(~value, width) - 1; in CountLeadingSignBitsFallBack()
Dcompiler-intrinsics.h115 inline int CountLeadingZeros(V value, int width = (sizeof(V) * 8)) {
Dutils.h189 return (sizeof(value) * 8 - 1) - CountLeadingZeros(value); in HighestSetBitPosition()
/external/vixl/src/vixl/a64/
Dlogic-a64.cc96 const int highest_significant_bit = 63 - CountLeadingZeros(src); in UFixedToDouble()
122 const int highest_significant_bit = 63 - CountLeadingZeros(src); in UFixedToFloat()
187 int shift = CountLeadingZeros(mantissa << (32 - 10)); in FPToFloat()
1843 result[i] = CountLeadingZeros(src.Uint(vform, i), laneSizeInBits); in clz()
1895 } else if ((shift_val > CountLeadingZeros(lj_src_val)) && in sshl()
1933 if ((shift_val > CountLeadingZeros(lj_src_val)) && (lj_src_val != 0)) { in ushl()
Dassembler-a64.cc51 int index = CountLeadingZeros(list_); in PopHighestIndex()
5182 clz_a = CountLeadingZeros(a, kXRegSize); in IsImmLogical()
5183 int clz_c = CountLeadingZeros(c, kXRegSize); in IsImmLogical()
5204 clz_a = CountLeadingZeros(a, kXRegSize); in IsImmLogical()
5237 uint64_t multiplier = multipliers[CountLeadingZeros(d, kXRegSize) - 57]; in IsImmLogical()
5252 int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSize); in IsImmLogical()
Dsimulator-a64.cc1600 case CLZ_w: set_wreg(dst, CountLeadingZeros(wreg(src))); break; in VisitDataProcessing1Source()
1601 case CLZ_x: set_xreg(dst, CountLeadingZeros(xreg(src))); break; in VisitDataProcessing1Source()
Dmacro-assembler-a64.cc1335 int shift_high = CountLeadingZeros(imm, reg_size); in MoveImmediateForShiftedOp()
Dsimulator-a64.h153 const int highest_significant_bit = 63 - CountLeadingZeros(mantissa); in FPRound()
/external/valgrind/VEX/priv/
Dhost_arm64_isel.c1006 static Int CountLeadingZeros(ULong value, Int width) in CountLeadingZeros() function
1109 UInt lead_zero = CountLeadingZeros(value, width); in isImmLogical()
1110 UInt lead_one = CountLeadingZeros(~value, width); in isImmLogical()