Searched refs:CreateMachineInstr (Results 1 – 14 of 14) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 236 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); in BuildMI()
245 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) in BuildMI()
258 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
269 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
296 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
306 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
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| D | MachineFunction.h | 423 MachineInstr *CreateMachineInstr(const MCInstrDesc &MCID,
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIInstrInfo.cpp | 55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc()); in getMovImmInstr()
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| D | AMDILCFGStructurizer.cpp | 3015 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrBefore()
3038 ->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrEnd()
3053 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), in insertInstrBefore()
3071 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), in insertCondBranchBefore()
3091 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DL); in insertCondBranchBefore()
3106 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DebugLoc()); in insertCondBranchEnd()
3155 blk->getParent()->CreateMachineInstr(tii->get(tii->getIEQOpcode()), DebugLoc()); in insertCompareInstrBefore()
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| D | R600InstrInfo.cpp | 81 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::MOV), DebugLoc()); in getMovImmInstr()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDILCFGStructurizer.cpp | 474 ->CreateMachineInstr(TII->get(NewOpcode), DL); in insertInstrEnd()
483 MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DL); in insertInstrBefore()
497 MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DebugLoc()); in insertInstrBefore()
509 MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL); in insertCondBranchBefore()
521 MachineInstr *NewInstr = MF->CreateMachineInstr(TII->get(NewOpcode), DL); in insertCondBranchBefore()
532 MF->CreateMachineInstr(TII->get(NewOpcode), DebugLoc()); in insertCondBranchEnd()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 256 auto *ExtMI = MF.CreateMachineInstr(HII->get(Hexagon::A4_ext), DebugLoc()); in tryAllocateResourcesForConstExt()
764 MachineInstr *NewMI = MF.CreateMachineInstr(D, DebugLoc()); in canPromoteToDotNew()
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| D | HexagonHardwareLoops.cpp | 1864 MachineInstr *NewPN = MF->CreateMachineInstr(PD, DL); in createPreheaderForLoop()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CollectLOH.cpp | 1058 DummyOp = MF.CreateMachineInstr(TII->get(AArch64::COPY), DebugLoc()); in runOnMachineFunction()
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| /external/llvm/lib/CodeGen/ |
| D | MachineFunction.cpp | 205 MachineFunction::CreateMachineInstr(const MCInstrDesc &MCID, in CreateMachineInstr() function in MachineFunction
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| D | TargetInstrInfo.cpp | 462 MF.CreateMachineInstr(TII.get(MI->getOpcode()), MI->getDebugLoc(), true); in foldPatchpoint()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 711 MF->CreateMachineInstr(get(ThreeOperandOpcode), in convertToThreeAddress()
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| /external/llvm/lib/CodeGen/MIRParser/ |
| D | MIParser.cpp | 643 MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true); in parse()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 5449 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), in FuseTwoAddrInst()
5477 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), in FuseInst()
6217 MachineInstr *DataMI = MF.CreateMachineInstr(MCID, MI->getDebugLoc(), true); in unfoldMemoryOperand()
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