| /external/llvm/test/MC/ARM/ |
| D | d16.s | 2 …ple thumbv7-unknown-unknown -show-encoding -mattr=+vfp4,+d16 2>&1 | FileCheck %s --check-prefix=D16
6 @ D16: invalid operand for instruction
7 @ D16-NEXT: vadd.f64 d1, d2, d16
10 @ D16: invalid operand for instruction
11 @ D16-NEXT: vadd.f64 d1, d17, d6
14 @ D16: invalid operand for instruction
15 @ D16-NEXT: vadd.f64 d19, d7, d6
18 @ D16: invalid operand for instruction
19 @ D16-NEXT: vcvt.f64.f32 d22, s4
22 @ D16: invalid operand for instruction
[all …]
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| /external/google-breakpad/src/common/linux/ |
| D | synth_elf.cc | 53 D16(ET_EXEC); //TODO: allow passing ET_DYN? in ELF()
55 D16(machine); in ELF()
67 D16(addr_size_ == 8 ? sizeof(Elf64_Ehdr) : sizeof(Elf32_Ehdr)); in ELF()
69 D16(addr_size_ == 8 ? sizeof(Elf64_Phdr) : sizeof(Elf32_Phdr)); in ELF()
71 D16(program_count_label_); in ELF()
73 D16(addr_size_ == 8 ? sizeof(Elf64_Shdr) : sizeof(Elf32_Shdr)); in ELF()
75 D16(section_count_label_); in ELF()
77 D16(section_header_string_index_); in ELF()
229 D16(shndx); in AddSymbol()
238 D16(shndx); in AddSymbol()
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| D | elf_symbols_to_module_unittest.cc | 105 .D16(shndx); in AddElf32Sym()
147 .D16(SHN_UNDEF + 1); in TEST_P()
176 .D16(SHN_UNDEF + 1); in TEST_P()
273 .D16(shndx) in AddElf64Sym()
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | d16.txt | 6 # D16: warning: invalid instruction encoding
10 # D16: warning: invalid instruction encoding
14 # D16: warning: invalid instruction encoding
18 # D16: warning: invalid instruction encoding
22 # D16: warning: invalid instruction encoding
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| /external/libhevc/decoder/arm/ |
| D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 228 VQMOVUN.S16 D16,Q8
232 VZIP.8 D16,D17
252 VST1.32 D16,[R2]!
279 VQMOVUN.S16 D16,Q8
283 VZIP.8 D16,D17
303 VST1.32 D16,[R8]!
359 VQMOVUN.S16 D16,Q8
363 VZIP.8 D16,D17
383 VST1.32 D16,[R2]!
401 VQMOVUN.S16 D16,Q8
[all …]
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| /external/google-breakpad/src/common/dwarf/ |
| D | cfi_assembler.h | 204 CFISection &D16(uint16_t v) { Section::D16(v); return *this; } in D16() function
205 CFISection &D16(Label v) { Section::D16(v); return *this; } in D16() function
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| D | dwarf2reader_test_common.h | 82 D16(version); in Header()
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| D | dwarf2reader_cfi_unittest.cc | 200 .D16(0xa0f) in TEST_F()
203 .D16(0); in TEST_F()
759 .D8(dwarf2reader::DW_CFA_advance_loc2).D16(0x3adb) in TEST_F()
2368 .D16(ET_EXEC) // file type: executable file in WriteELFFrameSection()
2369 .D16(EM_386) // architecture: Intel IA-32 in WriteELFFrameSection()
2376 .D16(elf_header_size) // ELF header size in bytes */ in WriteELFFrameSection()
2377 .D16(elf_class == ELFCLASS32 ? 32 : 56) // program header entry size in WriteELFFrameSection()
2378 .D16(0) // program header table entry count in WriteELFFrameSection()
2379 .D16(elf_class == ELFCLASS32 ? 40 : 64) // section header entry size in WriteELFFrameSection()
2380 .D16(3) // section count in WriteELFFrameSection()
[all …]
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| D | cfi_assembler.cc | 172 D16(address); in EncodedPointer()
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| D | dwarf2reader_die_unittest.cc | 317 info.D16(0); in TEST_P()
337 info.D16(sizeof(data)) in TEST_P()
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| /external/google-breakpad/src/processor/ |
| D | synth_minidump.cc | 59 D16(system_info.processor_architecture); in SystemInfo()
60 D16(system_info.processor_level); in SystemInfo()
61 D16(system_info.processor_revision); in SystemInfo()
69 D16(system_info.suite_mask); in SystemInfo()
70 D16(system_info.reserved2); // Well, why not? in SystemInfo()
117 D16(*i); in String()
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| /external/libhevc/common/arm/ |
| D | ihevc_sao_band_offset_chroma.s | 186 VCLE.U8 D16,D1,D30 @vcle_u8(band_table.val[0], vdup_n_u8(16))
187 VORR.U8 D1,D1,D16 @band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
196 VCLE.U8 D16,D1,D30 @vcle_u8(band_table.val[0], vdup_n_u8(16))
197 VAND.U8 D1,D1,D16 @band_table.val[0] = vand_u8(band_table.val[0], au1_cmp)
213 …VADD.I8 D16,D12,D30 @band_table_v.val[3] = vadd_u8(band_table_v.val[3], band_p…
225 …VADD.I8 D12,D16,D26 @band_table_v.val[3] = vadd_u8(band_table_v.val[3], vdup_n…
299 VSUB.I8 D16,D14,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
307 …VTBX.8 D14,{D9-D12},D16 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
353 VSUB.I8 D16,D14,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
361 …VTBX.8 D14,{D9-D12},D16 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
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| D | ihevc_sao_edge_offset_class0_chroma.s | 214 VTBL.8 D16,{D11},D14 @offset = vtbl1_s8(offset_tbl_u, vget_low_s8(edge_idx))
221 VZIP.S8 D16,D17
225 …VADDW.S8 Q9,Q9,D16 @pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0],…
379 VTBL.8 D16,{D11},D14 @offset = vtbl1_s8(offset_tbl_u, vget_low_s8(edge_idx))
386 VZIP.S8 D16,D17
388 …VADDW.S8 Q9,Q9,D16 @pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0],…
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| D | ihevc_sao_band_offset_luma.s | 203 VSUB.I8 D16,D15,D31 @vsub_u8(au1_cur_row, band_pos)
205 …VTBX.8 D15,{D1-D4},D16 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
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| D | ihevc_sao_edge_offset_class2.s | 269 VLD1.8 D16,[r8]! @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
334 VLD1.8 D16,[r8]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
405 …VMOVL.U8 Q10,D16 @III pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_…
448 VLD1.8 D16,[r8]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
581 VLD1.8 D16,[r8]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
711 VLD1.8 D16,[r8]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
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| /external/google-breakpad/src/common/ |
| D | test_assembler.h | 360 &D16(uint16_t), &D32(uint32_t), &D64(uint64_t);
365 &D8(const Label &label), &D16(const Label &label),
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| /external/llvm/test/CodeGen/ARM/ |
| D | subreg-remat.ll | 20 ; CHECK: vldr [[D16:d[0-9]+]],
21 ; CHECK: vstr [[D16]], [r1]
|
| /external/elfutils/tests/ |
| D | run-readelf-A.sh | 41 VFP_arch: VFPv3-D16
|
| /external/llvm/test/TableGen/ |
| D | if.td | 44 def D16 : S<16>;
50 // CHECK: def D16
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| /external/llvm/test/MC/MachO/ |
| D | x86_64-symbols.s | 53 D16: label
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| D | x86_32-symbols.s | 53 D16: label
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| /external/llvm/test/tools/llvm-readobj/ARM/ |
| D | attribute-8.s | 16 @CHECK-OBJ-NEXT: Description: ARMv8-a FP-D16
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| D | attribute-6.s | 16 @CHECK-OBJ-NEXT: Description: VFPv4-D16
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| D | attribute-4.s | 16 @CHECK-OBJ-NEXT: Description: VFPv3-D16
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| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 119 def D16 : ARMFReg<16, "d16">, DwarfRegNum<[272]>;
148 def Q8 : ARMReg< 8, "q8", [D16, D17]>;
293 // Allocate non-VFP2 registers D16-D31 first, and prefer even registers on
340 // Allocate starting at non-VFP2 registers D16-D31 first.
|