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Searched refs:DMULT (Results 1 – 7 of 7) sorted by relevance

/external/valgrind/none/tests/mips64/
Darithmetic_instruction.c10 DMULT, DMULTU, DSUB, DSUBU, enumerator
177 case DMULT: in main()
/external/pcre/dist/sljit/
DsljitNativeMIPS_64.c397 FAIL_IF(push_inst(compiler, DMULT | S(src1) | T(src2), MOVABLE_INS)); in emit_single_op()
400 FAIL_IF(push_inst(compiler, SELECT_OP(DMULT, MULT) | S(src1) | T(src2), MOVABLE_INS)); in emit_single_op()
404 FAIL_IF(push_inst(compiler, SELECT_OP(DMULT, MULT) | S(src1) | T(src2), MOVABLE_INS)); in emit_single_op()
DsljitNativeMIPS_common.c128 #define DMULT (HI(0) | LO(28)) macro
1050 …FAIL_IF(push_inst(compiler, (op == SLJIT_LUMUL ? DMULTU : DMULT) | S(SLJIT_R0) | T(SLJIT_R1), MOVA… in sljit_emit_op0()
/external/v8/src/mips64/
Dconstants-mips64.h424 DMULT = ((3U << 3) + 4), enumerator
971 FunctionFieldToBitNumber(MULT) | FunctionFieldToBitNumber(DMULT) |
Dassembler-mips64.cc1697 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DMULT); in dmult()
Dsimulator-mips64.cc3578 case DMULT: // DMULT == D_MUL_MUH. in DecodeTypeRegisterSPECIAL()
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td223 def DMULT : Mult<"dmult", II_DMULT, GPR64Opnd, [HI0_64, LO0_64]>,
227 def PseudoDMULT : MultDivPseudo<DMULT, ACC128, GPR64Opnd, MipsMult,