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Searched refs:DSRA32 (Results 1 – 9 of 9) sorted by relevance

/external/valgrind/none/tests/mips64/
Dshift_instructions.c7 DSLL32, DSLLV, DSRA, DSRA32, enumerator
96 case DSRA32: in main()
/external/pcre/dist/sljit/
DsljitNativeMIPS_64.c179 return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(24), DR(dst)); in emit_single_op()
193 return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(16), DR(dst)); in emit_single_op()
407 …FAIL_IF(push_inst(compiler, SELECT_OP(DSRA32, SRA) | T(dst) | DA(UGREATER_FLAG) | SH_IMM(31), UGRE… in emit_single_op()
431 EMIT_SHIFT(DSRA, DSRA32, SRA, DSRAV, SRAV); in emit_single_op()
DsljitNativeMIPS_common.c134 #define DSRA32 (HI(0) | LO(63)) macro
/external/v8/src/mips64/
Dconstants-mips64.h459 DSRA32 = ((7U << 3) + 7), enumerator
965 FunctionFieldToBitNumber(DSRA) | FunctionFieldToBitNumber(DSRA32) |
Ddisasm-mips64.cc1192 case DSRA32: in DecodeTypeRegisterSPECIAL()
Dassembler-mips64.cc1896 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, DSRA32); in dsra32()
Dsimulator-mips64.cc3452 case DSRA32: in DecodeTypeRegisterSPECIAL()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp76 Inst.setOpcode(Mips::DSRA32); in LowerLargeShift()
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td155 def DSRA32 : shift_rotate_imm<"dsra32", uimm5, GPR64Opnd, II_DSRA32>,