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Searched refs:FMUL (Results 1 – 25 of 84) sorted by relevance

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/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp3760 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in getLimitedPrecisionExp2()
3764 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in getLimitedPrecisionExp2()
3776 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in getLimitedPrecisionExp2()
3780 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in getLimitedPrecisionExp2()
3783 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); in getLimitedPrecisionExp2()
3797 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in getLimitedPrecisionExp2()
3801 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in getLimitedPrecisionExp2()
3804 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); in getLimitedPrecisionExp2()
3807 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X); in getLimitedPrecisionExp2()
3810 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X); in getLimitedPrecisionExp2()
[all …]
DDAGCombiner.cpp610 case ISD::FMUL: in isNegatibleForFree()
680 case ISD::FMUL: in GetNegatedExpression()
1411 case ISD::FMUL: return visitFMUL(N); in visit()
7660 if (Aggressive && N0.getOpcode() == ISD::FMUL && in visitFADDForFMACombine()
7661 N1.getOpcode() == ISD::FMUL) { in visitFADDForFMACombine()
7667 if (N0.getOpcode() == ISD::FMUL && in visitFADDForFMACombine()
7675 if (N1.getOpcode() == ISD::FMUL && in visitFADDForFMACombine()
7686 if (N00.getOpcode() == ISD::FMUL) in visitFADDForFMACombine()
7698 if (N10.getOpcode() == ISD::FMUL) in visitFADDForFMACombine()
7711 N0.getOperand(2).getOpcode() == ISD::FMUL) { in visitFADDForFMACombine()
[all …]
DLegalizeVectorOps.cpp272 case ISD::FMUL: in LegalizeOp()
1006 fHI = DAG.getNode(ISD::FMUL, DL, Op.getValueType(), fHI, TWOHW); in ExpandUINT_TO_FLOAT()
DSelectionDAGDumper.cpp198 case ISD::FMUL: return "fmul"; in getOperationName()
/external/javassist/src/main/javassist/bytecode/
DOpcode.java101 int FMUL = 106; field
/external/mockito/cglib-and-asm/src/org/mockito/asm/
DOpcodes.java245 int FMUL = 106; // - field
DFrame.java1089 case Opcodes.FMUL: in execute()
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h241 FADD, FSUB, FMUL, FDIV, FREM, enumerator
/external/valgrind/none/tests/ppc64/
Dround.c32 FADD, FSUB, FMUL, FDIV, FMADD, enumerator
974 case FMUL: in check_double_guarded_arithmetic_op()
1115 case FMUL: in check_double_guarded_arithmetic_op()
/external/valgrind/none/tests/ppc32/
Dround.c32 FADD, FSUB, FMUL, FDIV, FMADD, enumerator
974 case FMUL: in check_double_guarded_arithmetic_op()
1115 case FMUL: in check_double_guarded_arithmetic_op()
/external/mockito/cglib-and-asm/src/org/mockito/asm/tree/analysis/
DBasicInterpreter.java249 case FMUL: in binaryOperation()
DBasicVerifier.java251 case FMUL: in binaryOperation()
DFrame.java434 case Opcodes.FMUL: in execute()
/external/v8/src/ppc/
Dconstants-ppc.h273 FMUL = 25 << 1, // Floating Multiply enumerator
Ddisasm-ppc.cc925 case FMUL: { in DecodeExt4()
/external/v8/src/arm64/
Dconstants-arm64.h1079 FMUL = FPDataProcessing2SourceFixed | 0x00000000, enumerator
1080 FMUL_s = FMUL,
1081 FMUL_d = FMUL | FP64,
/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h828 X86_INTRINSIC_DATA(avx512_mask_mul_pd_128, INTR_TYPE_2OP_MASK, ISD::FMUL, 0),
829 X86_INTRINSIC_DATA(avx512_mask_mul_pd_256, INTR_TYPE_2OP_MASK, ISD::FMUL, 0),
830 X86_INTRINSIC_DATA(avx512_mask_mul_pd_512, INTR_TYPE_2OP_MASK, ISD::FMUL,
832 X86_INTRINSIC_DATA(avx512_mask_mul_ps_128, INTR_TYPE_2OP_MASK, ISD::FMUL, 0),
833 X86_INTRINSIC_DATA(avx512_mask_mul_ps_256, INTR_TYPE_2OP_MASK, ISD::FMUL, 0),
834 X86_INTRINSIC_DATA(avx512_mask_mul_ps_512, INTR_TYPE_2OP_MASK, ISD::FMUL,
836 X86_INTRINSIC_DATA(avx512_mask_mul_sd_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FMUL,
838 X86_INTRINSIC_DATA(avx512_mask_mul_ss_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FMUL,
/external/jacoco/org.jacoco.core.test/src/org/jacoco/core/internal/flow/
DLabelFlowAnalyzerTest.java198 testInsn(FMUL, true); in testInsn()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp1443 return DAG.getNode(ISD::FMUL, SL, VT, LHS, Recip, &Flags); in LowerFastFDIV()
1482 r1 = DAG.getNode(ISD::FMUL, SL, MVT::f32, RHS, r3); in LowerFDIV32()
1486 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f32, LHS, r0); in LowerFDIV32()
1488 return DAG.getNode(ISD::FMUL, SL, MVT::f32, r3, Mul); in LowerFDIV32()
1518 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, DivScale1, Fma3); in LowerFDIV64()
1603 DAG.getNode(ISD::FMUL, DL, VT, Arg, in LowerTrig()
DAMDGPUISelLowering.cpp354 setOperationAction(ISD::FMUL, VT, Expand); in AMDGPUTargetLowering()
1076 SDValue OneSubAC = DAG.getNode(ISD::FMUL, DL, VT, OneSubA, in LowerIntrinsicLRP()
1079 DAG.getNode(ISD::FMUL, DL, VT, Op.getOperand(1), Op.getOperand(2)), in LowerIntrinsicLRP()
1598 SDValue fq = DAG.getNode(ISD::FMUL, DL, FltVT, in LowerDIVREM24()
1609 DAG.getNode(ISD::FMUL, DL, FltVT, fqneg, fb), fa); in LowerDIVREM24()
1911 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, Floor, Y); in LowerFREM()
2207 FloatHi = DAG.getNode(ISD::FMUL, DL, MVT::f32, FloatHi, in LowerUINT_TO_FP()
2234 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, Trunc, K0); in LowerFP64_TO_INT()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUISelLowering.cpp171 SDValue OneSubAC = DAG.getNode(ISD::FMUL, DL, VT, OneSubA, in LowerIntrinsicLRP()
/external/jarjar/lib/
Dasm-4.0.jarMETA-INF/MANIFEST.MF org/objectweb/asm/AnnotationVisitor.class <Unknown> ...
/external/owasp/sanitizer/tools/findbugs/lib/
Dasm-3.3.jarMETA-INF/MANIFEST.MF org/objectweb/asm/AnnotationVisitor.class <Unknown> ...
/external/vixl/src/vixl/a64/
Dconstants-a64.h1189 FMUL = FPDataProcessing2SourceFixed | 0x00000000, enumerator
1190 FMUL_s = FMUL,
1191 FMUL_d = FMUL | FP64,
/external/guice/lib/build/
Dasm-5.0.3.jarMETA-INF/MANIFEST.MF org/ org/objectweb/ org/objectweb/asm/ ...

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