| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 742 EVT InVT = InOp.getValueType(); in SplitVecRes_BITCAST() local
745 switch (getTypeAction(InVT)) { in SplitVecRes_BITCAST()
1184 EVT InVT = N->getOperand(0).getValueType(); in SplitVecRes_UnaryOp() local
1185 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_UnaryOp()
1509 EVT InVT = Lo.getValueType(); in SplitVecOp_UnaryOp() local
1512 InVT.getVectorNumElements()); in SplitVecOp_UnaryOp()
1888 EVT InVT = InVec->getValueType(0); in SplitVecOp_TruncateHelper() local
1897 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits(); in SplitVecOp_TruncateHelper()
1959 EVT InVT = Lo.getValueType(); in SplitVecOp_FP_ROUND() local
1962 InVT.getVectorNumElements()); in SplitVecOp_FP_ROUND()
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| D | LegalizeTypesGeneric.cpp | 45 EVT InVT = InOp.getValueType(); in ExpandRes_BITCAST() local
49 switch (getTypeAction(InVT)) { in ExpandRes_BITCAST()
72 if (TLI.hasBigEndianPartOrdering(InVT, DL) != in ExpandRes_BITCAST()
93 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); in ExpandRes_BITCAST()
96 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT); in ExpandRes_BITCAST()
106 if (InVT.isVector() && OutVT.isInteger()) { in ExpandRes_BITCAST()
167 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment); in ExpandRes_BITCAST()
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| D | LegalizeIntegerTypes.cpp | 246 EVT InVT = InOp.getValueType(); in PromoteIntRes_BITCAST() local
247 EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT); in PromoteIntRes_BITCAST()
252 switch (getTypeAction(InVT)) { in PromoteIntRes_BITCAST()
703 EVT InVT = InOp.getValueType(); in PromoteIntRes_TRUNCATE() local
704 assert(InVT.isVector() && "Cannot split scalar types"); in PromoteIntRes_TRUNCATE()
705 unsigned NumElts = InVT.getVectorNumElements(); in PromoteIntRes_TRUNCATE()
3130 EVT InVT = InOp0.getValueType(); in PromoteIntRes_EXTRACT_SUBVECTOR() local
3149 InVT.getVectorElementType(), N->getOperand(0), Index); in PromoteIntRes_EXTRACT_SUBVECTOR()
3283 MVT InVT = V0.getValueType().getSimpleVT(); in PromoteIntOp_EXTRACT_SUBVECTOR() local
3284 MVT OutVT = MVT::getVectorVT(InVT.getVectorElementType(), in PromoteIntOp_EXTRACT_SUBVECTOR()
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| D | SelectionDAG.cpp | 2293 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
2294 unsigned InBits = InVT.getScalarType().getSizeInBits(); in computeKnownBits()
2305 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
2306 unsigned InBits = InVT.getScalarType().getSizeInBits(); in computeKnownBits()
2328 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
2329 unsigned InBits = InVT.getScalarType().getSizeInBits(); in computeKnownBits()
2338 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
2339 unsigned InBits = InVT.getScalarType().getSizeInBits(); in computeKnownBits()
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| D | TargetLowering.cpp | 941 EVT InVT = Op.getOperand(0).getValueType(); in SimplifyDemandedBits() local
942 unsigned InBits = InVT.getScalarType().getSizeInBits(); in SimplifyDemandedBits()
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| D | DAGCombiner.cpp | 12477 EVT InVT = In.getOperand(0).getValueType(); in reduceBuildVecConvertToConvertBuildVec() local
12482 SrcVT = InVT; in reduceBuildVecConvertToConvertBuildVec()
12483 if (SrcVT != InVT) in reduceBuildVecConvertToConvertBuildVec()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 154 bool EEVT::TypeSet::MergeInTypeInfo(const EEVT::TypeSet &InVT, TreePattern &TP){ in MergeInTypeInfo() argument
155 if (InVT.isCompletelyUnknown() || *this == InVT || TP.hasError()) in MergeInTypeInfo()
159 *this = InVT; in MergeInTypeInfo()
163 assert(!TypeVec.empty() && !InVT.TypeVec.empty() && "No unknowns"); in MergeInTypeInfo()
170 if (InVT.hasIntegerTypes()) { in MergeInTypeInfo()
171 EEVT::TypeSet InCopy(InVT); in MergeInTypeInfo()
177 TypeVec[0] = InVT.TypeVec[0]; in MergeInTypeInfo()
190 if ((InVT.TypeVec[0] == MVT::iPTR || InVT.TypeVec[0] == MVT::iPTRAny) && in MergeInTypeInfo()
196 if ((InVT.TypeVec[0] == MVT::iPTR || InVT.TypeVec[0] == MVT::iPTRAny) && in MergeInTypeInfo()
198 TypeVec.assign(1, InVT.TypeVec[0]); in MergeInTypeInfo()
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| D | CodeGenDAGPatterns.h | 113 bool MergeInTypeInfo(const EEVT::TypeSet &InVT, TreePattern &TP);
115 bool MergeInTypeInfo(MVT::SimpleValueType InVT, TreePattern &TP) { in MergeInTypeInfo() argument
116 return MergeInTypeInfo(EEVT::TypeSet(InVT, TP), TP); in MergeInTypeInfo()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 11882 MVT InVT = In.getSimpleValueType(); in LowerEXTRACT_SUBVECTOR() local
11886 (InVT.is256BitVector() || InVT.is512BitVector()) && in LowerEXTRACT_SUBVECTOR()
11890 if (ResVT.is256BitVector() && InVT.is512BitVector() && in LowerEXTRACT_SUBVECTOR()
13165 MVT InVT = In.getSimpleValueType(); in LowerAVXExtend() local
13168 if (VT.is512BitVector() || InVT.getVectorElementType() == MVT::i1) in LowerAVXExtend()
13184 if (((VT != MVT::v16i16) || (InVT != MVT::v16i8)) && in LowerAVXExtend()
13185 ((VT != MVT::v8i32) || (InVT != MVT::v8i16)) && in LowerAVXExtend()
13186 ((VT != MVT::v4i64) || (InVT != MVT::v4i32))) in LowerAVXExtend()
13192 SDValue ZeroVec = getZeroVector(InVT, Subtarget, DAG, dl); in LowerAVXExtend()
13193 SDValue Undef = DAG.getUNDEF(InVT); in LowerAVXExtend()
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| D | X86InstrAVX512.td | 283 X86VectorVTInfo InVT,
288 !con((ins InVT.RC:$src1), NonTiedIns),
289 !con((ins InVT.RC:$src1, InVT.KRCWM:$mask), NonTiedIns),
290 !con((ins InVT.RC:$src1, InVT.KRCWM:$mask), NonTiedIns),
292 (vselect InVT.KRCWM:$mask, RHS,
293 (bitconvert InVT.RC:$src1))>;
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 2647 EVT InVT = In.getValueType(); in lowerBITCAST() local
2657 if (InVT == MVT::i32 && ResVT == MVT::f32) { in lowerBITCAST()
2673 if (InVT == MVT::f32 && ResVT == MVT::i32) { in lowerBITCAST()
3564 MVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBytes * 8), in getPermuteNode() local
3566 Op0 = DAG.getNode(ISD::BITCAST, DL, InVT, Op0); in getPermuteNode()
3567 Op1 = DAG.getNode(ISD::BITCAST, DL, InVT, Op1); in getPermuteNode()
3571 Op = DAG.getNode(SystemZISD::PERMUTE_DWORDS, DL, InVT, Op0, Op1, Op2); in getPermuteNode()
3577 Op = DAG.getNode(P.Opcode, DL, InVT, Op0, Op1); in getPermuteNode()
4243 EVT InVT = PackedOp.getValueType(); in lowerExtendVectorInreg() local
4245 unsigned FromBits = InVT.getVectorElementType().getSizeInBits(); in lowerExtendVectorInreg()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2720 EVT InVT = N->getOperand(0).getValueType(); in Select() local
2721 assert((InVT == MVT::i64 || InVT == MVT::i32) && in Select()
2724 unsigned Opcode = (InVT == MVT::i64) ? PPC::ANDIo8 : PPC::ANDIo; in Select()
2725 SDValue AndI(CurDAG->getMachineNode(Opcode, dl, InVT, MVT::Glue, in Select()
2727 CurDAG->getTargetConstant(1, dl, InVT)), in Select()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1849 EVT InVT = Op.getOperand(0).getValueType(); in LowerVectorFP_TO_INT() local
1851 unsigned NumElts = InVT.getVectorNumElements(); in LowerVectorFP_TO_INT()
1854 if (InVT.getVectorElementType() == MVT::f16) { in LowerVectorFP_TO_INT()
1862 if (VT.getSizeInBits() < InVT.getSizeInBits()) { in LowerVectorFP_TO_INT()
1865 DAG.getNode(Op.getOpcode(), dl, InVT.changeVectorElementTypeToInteger(), in LowerVectorFP_TO_INT()
1870 if (VT.getSizeInBits() > InVT.getSizeInBits()) { in LowerVectorFP_TO_INT()
1918 EVT InVT = In.getValueType(); in LowerVectorINT_TO_FP() local
1920 if (VT.getSizeInBits() < InVT.getSizeInBits()) { in LowerVectorINT_TO_FP()
1922 MVT::getVectorVT(MVT::getFloatingPointVT(InVT.getScalarSizeInBits()), in LowerVectorINT_TO_FP()
1923 InVT.getVectorNumElements()); in LowerVectorINT_TO_FP()
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