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Searched refs:LdSt (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h93 bool getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg,
97 bool getMemOpBaseRegImmOfsWidth(MachineInstr *LdSt, unsigned &BaseReg,
DAArch64InstrInfo.cpp1316 AArch64InstrInfo::getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg, in getMemOpBaseRegImmOfs() argument
1319 switch (LdSt->getOpcode()) { in getMemOpBaseRegImmOfs()
1332 if (!LdSt->getOperand(1).isReg() || !LdSt->getOperand(2).isImm()) in getMemOpBaseRegImmOfs()
1334 BaseReg = LdSt->getOperand(1).getReg(); in getMemOpBaseRegImmOfs()
1335 MachineFunction &MF = *LdSt->getParent()->getParent(); in getMemOpBaseRegImmOfs()
1336 unsigned Width = getRegClass(LdSt->getDesc(), 0, TRI, MF)->getSize(); in getMemOpBaseRegImmOfs()
1337 Offset = LdSt->getOperand(2).getImm() * Width; in getMemOpBaseRegImmOfs()
1343 MachineInstr *LdSt, unsigned &BaseReg, int &Offset, int &Width, in getMemOpBaseRegImmOfsWidth() argument
1346 if (LdSt->getNumOperands() != 3) in getMemOpBaseRegImmOfsWidth()
1348 if (!LdSt->getOperand(1).isReg() || !LdSt->getOperand(2).isImm()) in getMemOpBaseRegImmOfsWidth()
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/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp204 bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg, in getMemOpBaseRegImmOfs() argument
207 unsigned Opc = LdSt->getOpcode(); in getMemOpBaseRegImmOfs()
209 if (isDS(*LdSt)) { in getMemOpBaseRegImmOfs()
210 const MachineOperand *OffsetImm = getNamedOperand(*LdSt, in getMemOpBaseRegImmOfs()
214 const MachineOperand *AddrReg = getNamedOperand(*LdSt, in getMemOpBaseRegImmOfs()
225 const MachineOperand *Offset0Imm = getNamedOperand(*LdSt, in getMemOpBaseRegImmOfs()
227 const MachineOperand *Offset1Imm = getNamedOperand(*LdSt, in getMemOpBaseRegImmOfs()
238 if (LdSt->mayLoad()) in getMemOpBaseRegImmOfs()
239 EltSize = getOpRegClass(*LdSt, 0)->getSize() / 2; in getMemOpBaseRegImmOfs()
241 assert(LdSt->mayStore()); in getMemOpBaseRegImmOfs()
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DSIInstrInfo.h90 bool getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg,
/external/llvm/lib/Target/X86/
DX86InstrInfo.h315 bool getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg,
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1136 LSBaseSDNode *LdSt = cast<LSBaseSDNode>(Op); in SelectAddrMode6Offset() local
1137 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1142 if (NC->getZExtValue() * 8 == LdSt->getMemoryVT().getSizeInBits()) in SelectAddrMode6Offset()