Searched refs:MRS (Results 1 – 25 of 27) sorted by relevance
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/external/llvm/test/CodeGen/AArch64/ |
D | flags-multiuse.ll | 25 ; Currently, the comparison is emitted again. An MSR/MRS pair would also be
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/external/llvm/test/MC/ARM/ |
D | thumbv7m.s | 10 @ MRS
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D | thumb2-mclass.s | 10 @ MRS
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D | basic-arm-instructions.s | 1408 @ MRS
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D | basic-thumb2-instructions.s | 1545 @ MRS
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/external/llvm/test/CodeGen/ARM/ |
D | copy-cpsr.ll | 26 ; In Thumb mode v7M and v7AR have different MRS/MSR instructions that happen
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb-MSR-MClass.txt | 4 # MRS
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D | thumb2.txt | 1106 # MRS
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D | basic-arm-instructions.txt | 835 # MRS
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/external/v8/src/arm64/ |
D | constants-arm64.h | 660 MRS = SystemSysRegFixed | 0x00200000, enumerator
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D | disasm-arm64.cc | 1138 case MRS: { in VisitSystem()
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D | assembler-arm64.cc | 1715 Emit(MRS | ImmSystemRegister(sysreg) | Rt(rt)); in mrs()
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D | simulator-arm64.cc | 3207 case MRS: { in VisitSystem()
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/external/llvm/test/MC/AArch64/ |
D | arm64-system-encoding.s | 58 ; MSR/MRS instructions
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/external/vixl/src/vixl/a64/ |
D | constants-a64.h | 687 MRS = SystemSysRegFixed | 0x00200000, enumerator
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D | disasm-a64.cc | 1297 case MRS: { in VisitSystem()
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D | simulator-a64.cc | 2331 case MRS: { in VisitSystem()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 2224 return CurDAG->getMachineNode(AArch64::MRS, DL, N->getSimpleValueType(0), in SelectReadRegister() 2237 return CurDAG->getMachineNode(AArch64::MRS, DL, N->getSimpleValueType(0), in SelectReadRegister()
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D | AArch64InstrInfo.cpp | 1821 BuildMI(MBB, I, DL, get(AArch64::MRS)) in copyPhysReg()
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D | AArch64InstrInfo.td | 410 def MRS : MRSI; 417 def : Pat<(AArch64threadpointer), (MRS 0xde82)>; 421 def : Pat<(readcyclecounter), (MRS 0xdce8)>;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 5155 def MRS : ABI<0b0001, (outs GPRnopc:$Rd), (ins), NoItinerary, 5167 def : InstAlias<"mrs${p} $Rd, cpsr", (MRS GPRnopc:$Rd, pred:$p)>, 5170 // The MRSsys instruction is the MRS instruction from the ARM ARM, 5184 // However, the MRS (banked register) system instruction (ARMv7VE) *does* have a
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D | ARMInstrThumb2.td | 4002 // A/R class MRS. 4040 // M class MRS. 4042 // This MRS has a mask field in bits 7-0 and can take more values than
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D | ARMBaseInstrInfo.cpp | 665 : ARM::MRS; in copyFromCPSR()
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D | ARMISelDAGToDAG.cpp | 3649 return CurDAG->getMachineNode(IsThumb2 ? ARM::t2MRS_AR : ARM::MRS, DL, in SelectReadRegister()
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/external/vixl/doc/ |
D | supported-instructions.md | 819 ### MRS ### subsection
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