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Searched refs:MTHC1 (Results 1 – 9 of 9) sorted by relevance

/external/llvm/test/CodeGen/Mips/llvm-ir/
Dret.ll10 … %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=NO-MTHC1 -check-prefix=NOT-…
11 …t < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=MTHC1 -check-prefix=NOT-…
12 …t < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=MTHC1 -check-prefix=NOT-…
13 …t < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=MTHC1 -check-prefix=NOT-…
14 …inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=MTHC1 -check-prefix=R6
155 ; NO-MTHC1-DAG: mtc1 $zero, $f0
157 ; MTHC1-DAG: mtc1 $zero, $f0
184 ; NO-MTHC1-DAG: mtc1 $zero, $f0
185 ; NO-MTHC1-DAG: mtc1 $zero, $f1
187 ; MTHC1-DAG: mtc1 $zero, $f0
[all …]
/external/v8/src/mips/
Dconstants-mips.h487 MTHC1 = ((0U << 3) + 7) << 21, enumerator
Ddisasm-mips.cc1317 case MTHC1: in DecodeTypeRegister()
Dassembler-mips.cc2180 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1()
Dsimulator-mips.cc3401 case MTHC1: in DecodeTypeRegisterCOP1()
/external/v8/src/mips64/
Dconstants-mips64.h530 MTHC1 = ((0U << 3) + 7) << 21, enumerator
Ddisasm-mips64.cc1098 case MTHC1: in DecodeTypeRegisterCOP1()
Dassembler-mips64.cc2533 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1()
Dsimulator-mips64.cc3342 case MTHC1: in DecodeTypeRegisterCOP1()