Searched refs:MTHC1 (Results 1 – 9 of 9) sorted by relevance
/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | ret.ll | 10 … %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=NO-MTHC1 -check-prefix=NOT-… 11 …t < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=MTHC1 -check-prefix=NOT-… 12 …t < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=MTHC1 -check-prefix=NOT-… 13 …t < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=MTHC1 -check-prefix=NOT-… 14 …inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR32 -check-prefix=MTHC1 -check-prefix=R6 155 ; NO-MTHC1-DAG: mtc1 $zero, $f0 157 ; MTHC1-DAG: mtc1 $zero, $f0 184 ; NO-MTHC1-DAG: mtc1 $zero, $f0 185 ; NO-MTHC1-DAG: mtc1 $zero, $f1 187 ; MTHC1-DAG: mtc1 $zero, $f0 [all …]
|
/external/v8/src/mips/ |
D | constants-mips.h | 487 MTHC1 = ((0U << 3) + 7) << 21, enumerator
|
D | disasm-mips.cc | 1317 case MTHC1: in DecodeTypeRegister()
|
D | assembler-mips.cc | 2180 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1()
|
D | simulator-mips.cc | 3401 case MTHC1: in DecodeTypeRegisterCOP1()
|
/external/v8/src/mips64/ |
D | constants-mips64.h | 530 MTHC1 = ((0U << 3) + 7) << 21, enumerator
|
D | disasm-mips64.cc | 1098 case MTHC1: in DecodeTypeRegisterCOP1()
|
D | assembler-mips64.cc | 2533 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1()
|
D | simulator-mips64.cc | 3342 case MTHC1: in DecodeTypeRegisterCOP1()
|