| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineShifts.cpp | 94 if (MaskedValueIsZero(I->getOperand(0), in CanEvaluateShifted()
134 if (IC.MaskedValueIsZero(I->getOperand(0), in CanEvaluateShifted()
159 if (IC.MaskedValueIsZero(I->getOperand(0), in CanEvaluateShifted()
712 MaskedValueIsZero(I.getOperand(0), in visitShl()
771 MaskedValueIsZero(Op0, APInt::getLowBitsSet(Op1C->getBitWidth(), ShAmt), in visitLShr()
816 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt), in visitAShr()
824 if (MaskedValueIsZero(Op0, in visitAShr()
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| D | InstCombineMulDivRem.cpp | 377 if (MaskedValueIsZero(Op0, Negative2, 0, &I)) in visitMul()
379 else if (MaskedValueIsZero(Op1, Negative2, 0, &I)) in visitMul()
1160 if (MaskedValueIsZero(Op0, Mask, 0, &I)) { in visitSDiv()
1161 if (MaskedValueIsZero(Op1, Mask, 0, &I)) { in visitSDiv()
1441 if (MaskedValueIsZero(Op1, Mask, 0, &I) && in visitSRem()
1442 MaskedValueIsZero(Op0, Mask, 0, &I)) { in visitSRem()
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| D | InstCombineAndOrXor.cpp | 394 if (MaskedValueIsZero(RHS, Mask, 0, &I)) in FoldLogicalPlusAnd()
1287 if (MaskedValueIsZero(Op0LHS, NotAndRHS, 0, &I)) { in visitAnd()
1294 MaskedValueIsZero(Op0RHS, NotAndRHS, 0, &I)) { in visitAnd()
1331 if (MaskedValueIsZero(Op0LHS, Mask, 0, &I)) { in visitAnd()
2305 MaskedValueIsZero(Op1, C1->getValue(), 0, &I)) { in visitOr()
2314 MaskedValueIsZero(Op0, C1->getValue(), 0, &I)) { in visitOr()
2353 MaskedValueIsZero(V2, ~C1->getValue(), 0, &I)) || // (V|N) in visitOr()
2355 MaskedValueIsZero(V1, ~C1->getValue(), 0, &I)))) // (N|V) in visitOr()
2361 MaskedValueIsZero(V2, ~C2->getValue(), 0, &I)) || // (V|N) in visitOr()
2363 MaskedValueIsZero(V1, ~C2->getValue(), 0, &I)))) // (N|V) in visitOr()
[all …]
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| D | InstCombineInternal.h | 477 bool MaskedValueIsZero(Value *V, const APInt &Mask, unsigned Depth = 0,
479 return llvm::MaskedValueIsZero(V, Mask, DL, Depth, AC, CxtI, DT);
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| D | InstCombineCasts.cpp | 371 if (IC.MaskedValueIsZero(I->getOperand(0), Mask, 0, CxtI) && in canEvaluateTruncated()
372 IC.MaskedValueIsZero(I->getOperand(1), Mask, 0, CxtI)) { in canEvaluateTruncated()
395 if (IC.MaskedValueIsZero(I->getOperand(0), in canEvaluateTruncated()
769 if (IC.MaskedValueIsZero(I->getOperand(1), in canEvaluateZExtd()
871 if (MaskedValueIsZero(Res, in visitZExt()
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| D | InstCombineAddSub.cpp | 1097 if (!MaskedValueIsZero(XorLHS, Mask, 0, &I)) in visitAdd()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreSelectionDAGInfo.cpp | 29 DAG.MaskedValueIsZero(Size, APInt(SizeBitWidth, 3))) { in EmitTargetCodeForMemcpy()
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| D | XCoreISelLowering.cpp | 688 if (DAG.MaskedValueIsZero(Mul.getOperand(0), HighMask) && in TryExpandADDWithMul()
689 DAG.MaskedValueIsZero(Mul.getOperand(1), HighMask)) { in TryExpandADDWithMul()
1793 DAG.MaskedValueIsZero(Mul0, HighMask) && in PerformDAGCombine()
1794 DAG.MaskedValueIsZero(Mul1, HighMask) && in PerformDAGCombine()
1795 DAG.MaskedValueIsZero(Addend0, HighMask) && in PerformDAGCombine()
1796 DAG.MaskedValueIsZero(Addend1, HighMask)) { in PerformDAGCombine()
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| /external/llvm/include/llvm/Analysis/ |
| D | ValueTracking.h | 111 bool MaskedValueIsZero(Value *V, const APInt &Mask, const DataLayout &DL,
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 229 CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getAPIntValue())) { in MatchAddress()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZOperators.td | 504 return CurDAG->MaskedValueIsZero(N->getOperand(0),
512 return CurDAG->MaskedValueIsZero(N->getOperand(1),
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1560 if (DAG.MaskedValueIsZero(N0, in SimplifySetCC()
1930 if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue())) in SimplifySetCC()
2922 if (DAG.MaskedValueIsZero(N->getOperand(0), HighMask) && in expandMUL()
2923 DAG.MaskedValueIsZero(N->getOperand(1), HighMask)) { in expandMUL()
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| D | DAGCombiner.cpp | 2951 if (DAG.MaskedValueIsZero(N0.getOperand(1), Mask)) { in visitANDLike()
3056 if (N1C && DAG.MaskedValueIsZero(SDValue(N, 0), in visitAND()
3072 if (DAG.MaskedValueIsZero(N0Op0, Mask)) { in visitAND()
3273 if (DAG.MaskedValueIsZero(N1, APInt::getHighBitsSet(BitWidth, in visitAND()
3293 if (DAG.MaskedValueIsZero(N1, APInt::getHighBitsSet(BitWidth, in visitAND()
3409 !DAG.MaskedValueIsZero( in MatchBSwapHWordLow()
3645 if (DAG.MaskedValueIsZero(N0.getOperand(0), RHSMask&~LHSMask) && in visitORLike()
3646 DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) { in visitORLike()
3774 if (N1C && DAG.MaskedValueIsZero(N0, ~N1C->getAPIntValue())) in visitOR()
4405 if (DAG.MaskedValueIsZero(SDValue(N, 0), in visitSHL()
[all …]
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| D | SelectionDAG.cpp | 2034 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); in SignBitIsZero()
2040 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, in MaskedValueIsZero() function in SelectionDAG
2784 !MaskedValueIsZero(Op.getOperand(0), in isBaseWithConstantOffset()
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| D | SelectionDAGISel.cpp | 1719 if (CurDAG->MaskedValueIsZero(LHS, NeededMask)) in CheckAndMask()
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| /external/llvm/lib/Analysis/ |
| D | InstructionSimplify.cpp | 1815 MaskedValueIsZero(V2, C2->getValue(), Q.DL, 0, Q.AC, Q.CxtI, Q.DT)) in SimplifyOrInst()
1818 MaskedValueIsZero(V1, C2->getValue(), Q.DL, 0, Q.AC, Q.CxtI, Q.DT)) in SimplifyOrInst()
1826 MaskedValueIsZero(V2, C1->getValue(), Q.DL, 0, Q.AC, Q.CxtI, Q.DT)) in SimplifyOrInst()
1829 MaskedValueIsZero(V1, C1->getValue(), Q.DL, 0, Q.AC, Q.CxtI, Q.DT)) in SimplifyOrInst()
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| D | ValueTracking.cpp | 208 static bool MaskedValueIsZero(Value *V, const APInt &Mask, const DataLayout &DL,
211 bool llvm::MaskedValueIsZero(Value *V, const APInt &Mask, const DataLayout &DL, in MaskedValueIsZero() function in llvm
214 return ::MaskedValueIsZero(V, Mask, DL, Depth, in MaskedValueIsZero()
2129 bool MaskedValueIsZero(Value *V, const APInt &Mask, const DataLayout &DL, in MaskedValueIsZero() function
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| D | BasicAliasAnalysis.cpp | 223 if (!MaskedValueIsZero(BOp->getOperand(0), RHSC->getValue(), DL, 0, AC, in GetLinearExpression()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1667 DAG.MaskedValueIsZero(RHS, APInt::getHighBitsSet(64, 32)) && in LowerUDIVREM64()
1668 DAG.MaskedValueIsZero(LHS, APInt::getHighBitsSet(64, 32))) { in LowerUDIVREM64()
1735 if (DAG.MaskedValueIsZero(Num, APInt::getHighBitsSet(32, 8)) && in LowerUDIVREM()
1736 DAG.MaskedValueIsZero(Den, APInt::getHighBitsSet(32, 8))) { in LowerUDIVREM()
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| D | SIISelLowering.cpp | 1639 if (DAG.MaskedValueIsZero(Src, APInt::getHighBitsSet(32, 24))) { in performUCharToFloatCombine()
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| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 1181 bool MaskedValueIsZero(SDValue Op, const APInt &Mask, unsigned Depth = 0)
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9480 if (!DAG.MaskedValueIsZero(N->getOperand(0), in DAGCombineTruncBoolExt()
9482 !DAG.MaskedValueIsZero(N->getOperand(1), in DAGCombineTruncBoolExt()
9868 !DAG.MaskedValueIsZero(Inputs[i].getOperand(0), in DAGCombineExtBoolTrunc()
10440 if (DAG.MaskedValueIsZero( in PerformDAGCombine()
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| D | PPCISelDAGToDAG.cpp | 3170 if (!CurDAG->MaskedValueIsZero(Op0, in combineToCMPB()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrCompiler.td | 1233 return CurDAG->MaskedValueIsZero(N->getOperand(0), CN->getAPIntValue());
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 9026 if (DAG.MaskedValueIsZero(N1, MaskC->getAPIntValue()) && in PerformORCombine()
10297 DAG.MaskedValueIsZero(N0.getOperand(0), in PerformShiftCombine()
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