| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 1104 class MemSDNode : public SDNode {
1114 MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
1117 MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
1221 class AtomicSDNode : public MemSDNode {
1261 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1270 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1279 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1288 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1337 class MemIntrinsicSDNode : public MemSDNode {
1342 : MemSDNode(Opc, Order, dl, VTs, Ops, MemoryVT, MMO) {
[all …]
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelDAGToDAG.cpp | 215 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <= in Select()
216 cast<MemSDNode>(Node)->getAlignment()) && in Select()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 154 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS;
332 return cast<MemSDNode>(N)->getAlignment() % 8 == 0;
346 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
364 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;
399 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::FLAT_ADDRESS;
405 [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]
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| D | SIISelLowering.cpp | 509 const MemSDNode *MemNode = cast<MemSDNode>(N); in isMemOpUniform()
2133 MemSDNode *MemNode = cast<MemSDNode>(N); in PerformDAGCombine()
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| D | AMDGPUISelDAGToDAG.cpp | 266 !checkType(cast<MemSDNode>(N)->getMemOperand()->getValue(), in glueCopyToM0()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 529 static unsigned int getCodeAddrSpace(MemSDNode *N) { in getCodeAddrSpace()
549 static bool canLowerToLDG(MemSDNode *N, const NVPTXSubtarget &Subtarget, in canLowerToLDG()
890 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectLoad()
905 MemSDNode *MemSD = cast<MemSDNode>(N); in SelectLoadVector()
1276 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectLoadVector()
1286 MemSDNode *Mem; in SelectLDGLDU()
1311 Mem = cast<MemSDNode>(N); in SelectLDGLDU()
2275 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectStore()
2290 MemSDNode *MemSD = cast<MemSDNode>(N); in SelectStoreVector()
2650 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectStoreVector()
[all …]
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| D | NVPTXISelLowering.cpp | 1927 MemSDNode *MemSD = cast<MemSDNode>(N); in LowerSTOREVector()
3991 MemSDNode *Mem = dyn_cast<MemSDNode>(Val); in PerformANDCombine()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 524 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { in print_details()
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| D | SelectionDAG.cpp | 510 const MemSDNode *PF = cast<MemSDNode>(N); in AddNodeIDCustom()
535 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); in AddNodeIDCustom()
6733 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, in MemSDNode() function in MemSDNode
6747 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, in MemSDNode() function in MemSDNode
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| D | SelectionDAGISel.cpp | 2797 MatchedMemRefs.push_back(cast<MemSDNode>(N)->getMemOperand()); in SelectCodeCommon()
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| D | LegalizeDAG.cpp | 3073 Node->getOperand(3), cast<MemSDNode>(Node)->getMemOperand(), in ExpandNode()
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| D | DAGCombiner.cpp | 14687 if (isa<MemSDNode>(*UI)) { in GatherAllAliases()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 364 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); in SelectIndexedBinOp()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 525 if (isa<MemSDNode>(Chain.getNode()) && in isCalleeLoad()
526 cast<MemSDNode>(Chain.getNode())->writeMem()) in isCalleeLoad()
1476 cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace(); in selectAddr()
1999 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in selectAtomicLoadArith()
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| D | X86InstrFragmentsSIMD.td | 674 return cast<MemSDNode>(N)->getAlignment() >= 16;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 613 if (cast<MemSDNode>(Use)->getOrdering() > Monotonic) in isWorthFoldingADDlow()
826 if (!isa<MemSDNode>(*UI)) in SelectAddrModeWRO()
910 if (!isa<MemSDNode>(*UI)) in SelectAddrModeXRO()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9396 if (MemSDNode *ChainLD = dyn_cast<MemSDNode>(ChainNext)) { in findConsecutiveLoad()
9427 if (MemSDNode *ChainLD = dyn_cast<MemSDNode>(LoadRoot)) in findConsecutiveLoad()
9433 if (((isa<MemSDNode>(*UI) && in findConsecutiveLoad()
9434 cast<MemSDNode>(*UI)->getChain().getNode() == LoadRoot) || in findConsecutiveLoad()
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| D | PPCISelDAGToDAG.cpp | 2408 MemOp[0] = cast<MemSDNode>(N)->getMemOperand(); in transferMemOperands()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1111 MemSDNode *MemN = cast<MemSDNode>(Parent); in SelectAddrMode6()
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| D | ARMISelLowering.cpp | 9494 MemSDNode *MemN = cast<MemSDNode>(N); in CombineBaseUpdate()
|