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Searched refs:OPCODE_IS_NOT_ZERO_INT (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeon/
DR600InstrInfo.cpp409 MO.setImm(OPCODE_IS_NOT_ZERO_INT); in ReverseBranchCondition()
411 case OPCODE_IS_NOT_ZERO_INT: in ReverseBranchCondition()
DAMDGPUInstrInfo.h29 #define OPCODE_IS_NOT_ZERO_INT 0x00000042 macro
DAMDILCFGStructurizer.cpp1674 static_cast<MachineInstr *>(I)->getOperand(2).setImm(OPCODE_IS_NOT_ZERO_INT); in reversePredicateSetter()
1676 case OPCODE_IS_NOT_ZERO_INT: in reversePredicateSetter()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.h29 #define OPCODE_IS_NOT_ZERO_INT AMDGPU::PRED_SETNE_INT macro
DR600InstrInfo.cpp960 MO.setImm(OPCODE_IS_NOT_ZERO_INT); in ReverseBranchCondition()
962 case OPCODE_IS_NOT_ZERO_INT: in ReverseBranchCondition()
DAMDILCFGStructurizer.cpp450 .setImm(OPCODE_IS_NOT_ZERO_INT); in reversePredicateSetter()
452 case OPCODE_IS_NOT_ZERO_INT: in reversePredicateSetter()
DR600ISelLowering.cpp525 .addImm(OPCODE_IS_NOT_ZERO_INT) in EmitInstrWithCustomInserter()