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Searched refs:OPCODE_IS_ZERO (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeon/
DR600InstrInfo.cpp414 case OPCODE_IS_ZERO: in ReverseBranchCondition()
418 MO.setImm(OPCODE_IS_ZERO); in ReverseBranchCondition()
DAMDGPUInstrInfo.h30 #define OPCODE_IS_ZERO 0x00000020 macro
DR600ISelLowering.cpp210 .addImm(OPCODE_IS_ZERO) in EmitInstrWithCustomInserter()
DAMDILCFGStructurizer.cpp1679 case OPCODE_IS_ZERO: in reversePredicateSetter()
1683 static_cast<MachineInstr *>(I)->getOperand(2).setImm(OPCODE_IS_ZERO); in reversePredicateSetter()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.h30 #define OPCODE_IS_ZERO AMDGPU::PRED_SETE macro
DR600InstrInfo.cpp965 case OPCODE_IS_ZERO: in ReverseBranchCondition()
969 MO.setImm(OPCODE_IS_ZERO); in ReverseBranchCondition()
DAMDILCFGStructurizer.cpp456 case OPCODE_IS_ZERO: in reversePredicateSetter()
462 .setImm(OPCODE_IS_ZERO); in reversePredicateSetter()