Searched refs:OpR (Results 1 – 5 of 5) sorted by relevance
109 Record *OpR = cast<DefInit>(MIOI->getArg(j))->getDef(); in GetOperandInfo() local110 OperandList.back().Rec = OpR; in GetOperandInfo()115 Record *OpR = OperandList[j].Rec; in GetOperandInfo() local118 if (OpR->isSubClassOf("RegisterOperand")) in GetOperandInfo()119 OpR = OpR->getValueAsDef("RegClass"); in GetOperandInfo()120 if (OpR->isSubClassOf("RegisterClass")) in GetOperandInfo()121 Res += getQualifiedName(OpR) + "RegClassID, "; in GetOperandInfo()122 else if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo()123 Res += utostr(OpR->getValueAsInt("RegClassKind")) + ", "; in GetOperandInfo()132 if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo()
1193 const MachineOperand &OpR = secondRegMatch ? NOp0 : NOp1; in isLegalToPacketizeTogether() local1194 if (OpR.isReg() && PI->modifiesRegister(OpR.getReg(), HRI)) { in isLegalToPacketizeTogether()
1181 Value *OpR = InstR->getOperand(i); in cmpBasicBlocks() local1182 if (int Res = cmpValues(OpL, OpR)) in cmpBasicBlocks()1185 assert(cmpTypes(OpL->getType(), OpR->getType()) == 0); in cmpBasicBlocks()
1285 Value *OpL = nullptr, *OpR = nullptr;1298 auto RHS = m_LShr(m_Neg(m_Value(OpR)), m_SpecificInt(ShiftWidth));1301 return Signum.match(V) && OpL == OpR && Val.match(OpL);
947 SDValue OpR = GetPromotedInteger(NewRHS); in PromoteSetCCOperands() local955 OpR->getOpcode() == ISD::AssertSext && in PromoteSetCCOperands()956 cast<VTSDNode>(OpR->getOperand(1))->getVT() == NewRHS.getValueType()) { in PromoteSetCCOperands()958 NewRHS = OpR; in PromoteSetCCOperands()