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Searched refs:OpVT (Results 1 – 25 of 25) sorted by relevance

/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp440 RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) { in getFPEXT() argument
441 if (OpVT == MVT::f16) { in getFPEXT()
444 } else if (OpVT == MVT::f32) { in getFPEXT()
449 } else if (OpVT == MVT::f64) { in getFPEXT()
459 RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) { in getFPROUND() argument
461 if (OpVT == MVT::f32) in getFPROUND()
463 if (OpVT == MVT::f64) in getFPROUND()
465 if (OpVT == MVT::f80) in getFPROUND()
467 if (OpVT == MVT::f128) in getFPROUND()
469 if (OpVT == MVT::ppcf128) in getFPROUND()
[all …]
/external/llvm/include/llvm/CodeGen/
DRuntimeLibcalls.h399 Libcall getFPEXT(EVT OpVT, EVT RetVT);
403 Libcall getFPROUND(EVT OpVT, EVT RetVT);
407 Libcall getFPTOSINT(EVT OpVT, EVT RetVT);
411 Libcall getFPTOUINT(EVT OpVT, EVT RetVT);
415 Libcall getSINTTOFP(EVT OpVT, EVT RetVT);
419 Libcall getUINTTOFP(EVT OpVT, EVT RetVT);
DSelectionDAG.h628 SDValue getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT, EVT OpVT);
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelDAGToDAG.cpp165 EVT OpVT = N->getValueType(0); in Select() local
168 return CurDAG->SelectNodeTo(N, NewOpc, OpVT, TFI); in Select()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGSDNodes.cpp462 EVT OpVT = N->getOperand(i).getValueType(); in AddSchedEdges() local
463 assert(OpVT != MVT::Glue && "Glued nodes should be in same sunit!"); in AddSchedEdges()
464 bool isChain = OpVT == MVT::Other; in AddSchedEdges()
DLegalizeFloatTypes.cpp1705 static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) { in GetPromotionOpcode() argument
1706 if (OpVT == MVT::f16) { in GetPromotionOpcode()
1744 EVT OpVT = Op->getValueType(0); in PromoteFloatOp_BITCAST() local
1746 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits()); in PromoteFloatOp_BITCAST()
1753 return DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N), IVT, in PromoteFloatOp_BITCAST()
2054 EVT OpVT = Op->getValueType(0); in PromoteFloatRes_FP_ROUND() local
2059 SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op); in PromoteFloatRes_FP_ROUND()
DLegalizeVectorTypes.cpp248 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_UnaryOp() local
257 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_UnaryOp()
260 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_UnaryOp()
302 EVT OpVT = Cond->getOperand(0)->getValueType(0); in ScalarizeVecRes_VSELECT() local
303 ScalarBool = TLI.getBooleanContents(OpVT.getScalarType()); in ScalarizeVecRes_VSELECT()
304 VecBool = TLI.getBooleanContents(OpVT); in ScalarizeVecRes_VSELECT()
385 EVT OpVT = LHS.getValueType(); in ScalarizeVecRes_VSETCC() local
390 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_VSETCC()
394 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_VSETCC()
409 TargetLowering::getExtendForContent(TLI.getBooleanContents(OpVT)); in ScalarizeVecRes_VSETCC()
DLegalizeDAG.cpp1268 MVT OpVT = Node->getOperand(CompareOperand).getSimpleValueType(); in LegalizeOp() local
1271 Action = TLI.getCondCodeAction(CCCode, OpVT); in LegalizeOp()
1277 Action = TLI.getOperationAction(Node->getOpcode(), OpVT); in LegalizeOp()
1825 MVT OpVT = LHS.getSimpleValueType(); in LegalizeSetCCCondCode() local
1828 switch (TLI.getCondCodeAction(CCCode, OpVT)) { in LegalizeSetCCCondCode()
1835 if (TLI.isCondCodeLegal(InvCC, OpVT)) { in LegalizeSetCCCondCode()
1845 assert(TLI.getCondCodeAction(ISD::SETOEQ, OpVT) in LegalizeSetCCCondCode()
1850 assert(TLI.getCondCodeAction(ISD::SETUNE, OpVT) in LegalizeSetCCCondCode()
1867 if (!OpVT.isInteger()) { in LegalizeSetCCCondCode()
1887 if (TLI.isCondCodeLegal(InvCC, OpVT)) { in LegalizeSetCCCondCode()
[all …]
DLegalizeTypes.cpp282 EVT OpVT = N->getOperand(i).getValueType(); in run() local
283 switch (getTypeAction(OpVT)) { in run()
DDAGCombiner.cpp8863 EVT OpVT = N0.getValueType(); in visitSINT_TO_FP() local
8874 if (!TLI.isOperationLegalOrCustom(ISD::SINT_TO_FP, OpVT) && in visitSINT_TO_FP()
8875 TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, OpVT)) { in visitSINT_TO_FP()
8917 EVT OpVT = N0.getValueType(); in visitUINT_TO_FP() local
8928 if (!TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, OpVT) && in visitUINT_TO_FP()
8929 TLI.isOperationLegalOrCustom(ISD::SINT_TO_FP, OpVT)) { in visitUINT_TO_FP()
12065 EVT OpVT = Ops[0].getValueType(); in visitINSERT_VECTOR_ELT() local
12066 if (InVal.getValueType() != OpVT) in visitINSERT_VECTOR_ELT()
12067 InVal = OpVT.bitsGT(InVal.getValueType()) ? in visitINSERT_VECTOR_ELT()
12068 DAG.getNode(ISD::ANY_EXTEND, dl, OpVT, InVal) : in visitINSERT_VECTOR_ELT()
[all …]
DTargetLowering.cpp1193 EVT OpVT = Val.getValueType(); in ValueHasExactlyOneBitSet() local
1194 unsigned BitWidth = OpVT.getScalarType().getSizeInBits(); in ValueHasExactlyOneBitSet()
DSelectionDAGBuilder.cpp6124 MVT OpVT = MVT::Other; in visitInlineAsm() local
6139 OpVT = TLI.getSimpleValueType(DAG.getDataLayout(), in visitInlineAsm()
6143 OpVT = TLI.getSimpleValueType(DAG.getDataLayout(), CS.getType()); in visitInlineAsm()
6164 OpVT = OpInfo.getCallOperandValEVT(*DAG.getContext(), TLI, in visitInlineAsm()
6168 OpInfo.ConstraintVT = OpVT; in visitInlineAsm()
DLegalizeIntegerTypes.cpp1115 EVT OpVT = N->getOpcode() == ISD::SELECT ? OpTy.getScalarType() : OpTy; in PromoteIntOp_SELECT() local
1116 Cond = PromoteTargetBoolean(Cond, OpVT); in PromoteIntOp_SELECT()
DSelectionDAG.cpp1030 EVT OpVT) { in getBoolExtOrTrunc() argument
1034 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT); in getBoolExtOrTrunc()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp2326 EVT OpVT = Op.getOperand(0).getValueType(); in LowerSINT_TO_FP() local
2327 assert(OpVT == MVT::i32 || (OpVT == MVT::i64)); in LowerSINT_TO_FP()
2329 EVT floatVT = (OpVT == MVT::i32) ? MVT::f32 : MVT::f64; in LowerSINT_TO_FP()
2333 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP()
2334 const char *libName = TLI.getLibcallName(OpVT == MVT::i32 in LowerSINT_TO_FP()
2341 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP()
2346 unsigned opcode = (OpVT == MVT::i32)? SPISD::ITOF : SPISD::XTOF; in LowerSINT_TO_FP()
2375 EVT OpVT = Op.getOperand(0).getValueType(); in LowerUINT_TO_FP() local
2376 assert(OpVT == MVT::i32 || OpVT == MVT::i64); in LowerUINT_TO_FP()
2380 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonISelDAGToDAG.cpp771 EVT OpVT = Op0.getValueType(); in SelectZeroExtend() local
772 unsigned OpBW = OpVT.getSizeInBits(); in SelectZeroExtend()
775 if (OpVT.isVector() && OpVT.getVectorElementType() == MVT::i1 && OpBW <= 64) { in SelectZeroExtend()
777 unsigned NE = OpVT.getVectorNumElements(); in SelectZeroExtend()
DHexagonISelLowering.cpp1268 EVT OpVT = Op1.getValueType(); in LowerVSELECT() local
1271 if (OpVT == MVT::v2i16) { in LowerVSELECT()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp4584 MVT OpVT = Op.getSimpleValueType(); in Insert1BitVector() local
4586 unsigned NumElems = OpVT.getVectorNumElements(); in Insert1BitVector()
4601 SDValue Undef = DAG.getUNDEF(OpVT); in Insert1BitVector()
4603 DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, Undef, SubVec, ZeroIdx); in Insert1BitVector()
4605 return DAG.getNode(X86ISD::VSHLI, dl, OpVT, WideSubVec, in Insert1BitVector()
4611 WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, WideSubVec, in Insert1BitVector()
4613 return ShiftRight ? DAG.getNode(X86ISD::VSRLI, dl, OpVT, WideSubVec, in Insert1BitVector()
4620 Vec = DAG.getNode(X86ISD::VSRLI, dl, OpVT, Vec, ShiftBits); in Insert1BitVector()
4621 Vec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec, ShiftBits); in Insert1BitVector()
4623 return DAG.getNode(ISD::OR, dl, OpVT, Vec, WideSubVec); in Insert1BitVector()
[all …]
DX86InstrFMA.td268 X86MemOperand x86memop, ValueType OpVT, SDNode OpNode,
276 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
DX86InstrSSE.td2820 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
2829 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))], itins.rr>,
2836 [(set RC:$dst, (OpVT (OpNode RC:$src1,
5554 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
5563 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))], itins.rr>,
5571 (OpVT (OpNode RC:$src1,
6783 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
6792 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
6800 (OpVT (OpNode RC:$src1, (bitconvert (memop_frag addr:$src2)))))]>,
6965 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
[all …]
DX86InstrAVX512.td3244 ValueType OpVT, RegisterClass RC, X86MemOperand memop,
3250 [(st_frag (OpVT RC:$src), addr:$dst)], d, itin>, EVEX;
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1921 EVT OpVT = Ops[0].getValueType(); in PerformDAGCombine() local
1922 if (InVal.getValueType() != OpVT) in PerformDAGCombine()
1923 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
1924 DAG.getNode(ISD::ANY_EXTEND, dl, OpVT, InVal) : in PerformDAGCombine()
1925 DAG.getNode(ISD::TRUNCATE, dl, OpVT, InVal); in PerformDAGCombine()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp3995 EVT OpVT = (VT == MVT::f32) ? MVT::v2i32 : MVT::v1i64; in LowerFCOPYSIGN() local
3997 Mask = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
3998 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
4005 Tmp1 = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
4006 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
4012 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
4013 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
4018 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
4019 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
4021 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
[all …]
/external/llvm/utils/TableGen/
DCodeGenDAGPatterns.cpp1797 MVT::SimpleValueType OpVT = Int->IS.ParamVTs[i]; in ApplyTypeConstraints() local
1799 MadeChange |= getChild(i+1)->UpdateNodeType(0, OpVT, TP); in ApplyTypeConstraints()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp4578 EVT OpVT = Op.getValueType(); in combineExtract() local
4579 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()
4608 EVT OpVT = Op.getOperand(0).getValueType(); in combineExtract() local
4610 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()