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Searched refs:R600 (Results 1 – 25 of 102) sorted by relevance

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/external/llvm/test/CodeGen/AMDGPU/
Dload.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
12 ; R600: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
23 ; R600: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]]
24 ; R600: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
25 ; R600: 8
36 ; R600: VTX_READ_8
37 ; R600: VTX_READ_8
49 ; R600-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
50 ; R600-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
[all …]
Dsetcc.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
7 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z
8 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y
18 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
19 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
20 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
21 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
38 ; R600: SETE_DX10
49 ; R600: SETGT_DX10
60 ; R600: SETGE_DX10
[all …]
Dfdiv.ll1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 %s
10 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Z
11 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Y
12 ; R600-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[3].X, PS
13 ; R600-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].W, PS
27 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Z
28 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Y
29 ; R600-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[3].X, PS
30 ; R600-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].W, PS
44 ; R600-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
[all …]
Dfadd.ll1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
6 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
15 ; R600-DAG: ADD {{\** *}}T{{[0-9]\.[XYZW]}}, KC0[3].X, KC0[3].Z
16 ; R600-DAG: ADD {{\** *}}T{{[0-9]\.[XYZW]}}, KC0[2].W, KC0[3].Y
26 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
27 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
28 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
29 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
44 ; R600: ADD
45 ; R600: ADD
[all …]
Dbuild_vector.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600
5 ; R600: {{^}}build_vector2:
6 ; R600: MOV
7 ; R600: MOV
8 ; R600-NOT: MOV
19 ; R600: {{^}}build_vector4:
20 ; R600: MOV
21 ; R600: MOV
22 ; R600: MOV
23 ; R600: MOV
[all …]
Dllvm.sqrt.ll1 ; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600
5 ; R600-LABEL: {{^}}sqrt_f32:
6 ; R600: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
7 ; R600: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS
17 ; R600-LABEL: {{^}}sqrt_v2f32:
18 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W
19 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS
20 ; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X
21 ; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS
32 ; R600-LABEL: {{^}}sqrt_v4f32:
[all …]
Duint_to_fp.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
6 ; R600-DAG: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].Z
17 ; R600-DAG: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].W
18 ; R600-DAG: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[3].X
30 ; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
31 ; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
32 ; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
33 ; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
48 ; R600: UINT_TO_FLT
49 ; R600: UINT_TO_FLT
[all …]
Dfneg.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
6 ; R600: -PV
16 ; R600: -PV
17 ; R600: -PV
28 ; R600: -PV
29 ; R600: -T
30 ; R600: -PV
31 ; R600: -PV
48 ; R600-NOT: XOR
49 ; R600: -KC0[2].Z
Dllvm.rint.ll1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
6 ; R600: RNDNE
17 ; R600: RNDNE
18 ; R600: RNDNE
30 ; R600: RNDNE
31 ; R600: RNDNE
32 ; R600: RNDNE
33 ; R600: RNDNE
47 ; R600: RNDNE
Dfabs.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
11 ; R600-NOT: AND
12 ; R600: |PV.{{[XYZW]}}|
24 ; R600-NOT: AND
25 ; R600: |PV.{{[XYZW]}}|
37 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
47 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
48 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
59 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
60 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
[all …]
Dllvm.round.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
17 ; R600: TRUNC {{.*}}, [[ARG:KC[0-9]\[[0-9]+\]\.[XYZW]]]
18 ; R600-DAG: ADD {{.*}},
19 ; R600-DAG: BFI_INT
20 ; R600-DAG: SETGE
21 ; R600-DAG: CNDE
22 ; R600-DAG: ADD
36 ; R600: CF_END
45 ; R600: CF_END
54 ; R600: CF_END
Dbfi_int.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 %s
8 ; R600: {{^}}bfi_def:
9 ; R600: BFI_INT
24 ; R600: {{^}}bfi_sha256_ch:
25 ; R600: BFI_INT
39 ; R600: {{^}}bfi_sha256_ma:
40 ; R600: XOR_INT * [[DST:T[0-9]+\.[XYZW]]], KC0[2].Z, KC0[2].W
41 ; R600: BFI_INT * {{T[0-9]+\.[XYZW]}}, {{[[DST]]|PV\.[XYZW]}}, KC0[3].X, KC0[2].W
Drotr.ll1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s
6 ; R600: BIT_ALIGN_INT
20 ; R600: BIT_ALIGN_INT
21 ; R600: BIT_ALIGN_INT
36 ; R600: BIT_ALIGN_INT
37 ; R600: BIT_ALIGN_INT
38 ; R600: BIT_ALIGN_INT
39 ; R600: BIT_ALIGN_INT
Dsint_to_fp.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
7 ; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].Z
16 ; R600-DAG: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].W
17 ; R600-DAG: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[3].X
28 ; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
29 ; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
30 ; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
31 ; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Dr600-encoding.ll2 ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=rs880 | FileCheck --check-prefix=R600 %s
4 ; The earliest R600 GPUs have a slightly different encoding than the rest of
10 ; R600: {{^}}test:
11 ; R600: MUL_IEEE {{[ *TXYZWPVxyzw.,0-9]+}} ; encoding: [{{0x[0-9a-f]+,0x[0-9a-f]+,0x[0-9a-f]+,0x[0-…
19 call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
23 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
Dfneg-fabs.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
33 ; R600-NOT: AND
34 ; R600: |PV.{{[XYZW]}}|
35 ; R600: -PV
47 ; R600-NOT: AND
48 ; R600: |PV.{{[XYZW]}}|
49 ; R600: -PV
80 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
81 ; R600: -PV
82 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
[all …]
Dfmul.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
7 ; R600: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
17 declare float @llvm.R600.load.input(i32) readnone
22 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
23 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
35 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
36 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
37 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
38 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Dfsub.ll1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
18 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, -KC0[2].W
27 declare float @llvm.R600.load.input(i32) readnone
32 ; R600-DAG: ADD {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[3].X, -KC0[3].Z
33 ; R600-DAG: ADD {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].W, -KC0[3].Y
45 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
46 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
47 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
48 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
Dtexture-input-merge.ll19 …%14 = call <4 x float> @llvm.R600.tex(<4 x float> %10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i…
20 …%15 = call <4 x float> @llvm.R600.tex(<4 x float> %12, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i…
21 …%16 = call <4 x float> @llvm.R600.tex(<4 x float> %13, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i…
24 call void @llvm.R600.store.swizzle(<4 x float> %18, i32 0, i32 0)
28 declare <4 x float> @llvm.R600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readno…
29 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
Dffloor.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
7 ; R600: FLOOR
30 ; R600: FLOOR
31 ; R600: FLOOR
32 ; R600: FLOOR
33 ; R600: FLOOR
Dtex-clause-antidep.ll15 …%9 = call <4 x float> @llvm.R600.tex(<4 x float> %8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32…
16 …%10 = call <4 x float> @llvm.R600.tex(<4 x float> %8, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i3…
18 call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
22 declare <4 x float> @llvm.R600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readno…
23 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
Dcall_fs.ll3 ; RUN: llc < %s -march=r600 -mcpu=rv710 -show-mc-encoding -o - | FileCheck --check-prefix=R600 %s
8 ; R600: .long 257
9 ; R600: {{^}}call_fs:
10 ; R600:CALL_FS ; encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x89]
Dllvm.AMDGPU.imad24.ll4 ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -che…
5 ; XUN: llc -march=r600 -mcpu=r600 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-…
6 ; XUN: llc -march=r600 -mcpu=r770 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-…
15 ; R600: MULLO_INT
16 ; R600: ADD_INT
Datomic_load_sub.ll1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
6 ; R600: LDS_SUB *
14 ; R600: LDS_SUB *
23 ; R600: LDS_SUB_RET *
32 ; R600: LDS_SUB_RET *
Datomic_load_add.ll3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
6 ; R600: LDS_ADD *
14 ; R600: LDS_ADD *
23 ; R600: LDS_ADD_RET *
32 ; R600: LDS_ADD_RET *

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