1; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
4
5; FUNC-LABEL: {{^}}round_f32:
6; SI-DAG: s_load_dword [[SX:s[0-9]+]]
7; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x7fffffff
8; SI: v_trunc_f32_e32 [[TRUNC:v[0-9]+]], [[SX]]
9; SI: v_sub_f32_e32 [[SUB:v[0-9]+]], [[SX]], [[TRUNC]]
10; SI: v_mov_b32_e32 [[VX:v[0-9]+]], [[SX]]
11; SI: v_bfi_b32 [[COPYSIGN:v[0-9]+]], [[K]], 1.0, [[VX]]
12; SI: v_cmp_le_f32_e64 vcc, 0.5, |[[SUB]]|
13; SI: v_cndmask_b32_e32 [[SEL:v[0-9]+]], 0, [[VX]]
14; SI: v_add_f32_e32 [[RESULT:v[0-9]+]], [[SEL]], [[TRUNC]]
15; SI: buffer_store_dword [[RESULT]]
16
17; R600: TRUNC {{.*}}, [[ARG:KC[0-9]\[[0-9]+\]\.[XYZW]]]
18; R600-DAG: ADD  {{.*}},
19; R600-DAG: BFI_INT
20; R600-DAG: SETGE
21; R600-DAG: CNDE
22; R600-DAG: ADD
23define void @round_f32(float addrspace(1)* %out, float %x) #0 {
24  %result = call float @llvm.round.f32(float %x) #1
25  store float %result, float addrspace(1)* %out
26  ret void
27}
28
29; The vector tests are really difficult to verify, since it can be hard to
30; predict how the scheduler will order the instructions.  We already have
31; a test for the scalar case, so the vector tests just check that the
32; compiler doesn't crash.
33
34; FUNC-LABEL: {{^}}round_v2f32:
35; SI: s_endpgm
36; R600: CF_END
37define void @round_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) #0 {
38  %result = call <2 x float> @llvm.round.v2f32(<2 x float> %in) #1
39  store <2 x float> %result, <2 x float> addrspace(1)* %out
40  ret void
41}
42
43; FUNC-LABEL: {{^}}round_v4f32:
44; SI: s_endpgm
45; R600: CF_END
46define void @round_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) #0 {
47  %result = call <4 x float> @llvm.round.v4f32(<4 x float> %in) #1
48  store <4 x float> %result, <4 x float> addrspace(1)* %out
49  ret void
50}
51
52; FUNC-LABEL: {{^}}round_v8f32:
53; SI: s_endpgm
54; R600: CF_END
55define void @round_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %in) #0 {
56  %result = call <8 x float> @llvm.round.v8f32(<8 x float> %in) #1
57  store <8 x float> %result, <8 x float> addrspace(1)* %out
58  ret void
59}
60
61declare float @llvm.round.f32(float) #1
62declare <2 x float> @llvm.round.v2f32(<2 x float>) #1
63declare <4 x float> @llvm.round.v4f32(<4 x float>) #1
64declare <8 x float> @llvm.round.v8f32(<8 x float>) #1
65
66attributes #0 = { nounwind }
67attributes #1 = { nounwind readnone }
68