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Searched refs:SIInstrInfo (Results 1 – 25 of 27) sorted by relevance

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/external/mesa3d/src/gallium/drivers/radeon/
DSIInstrInfo.cpp25 SIInstrInfo::SIInstrInfo(AMDGPUTargetMachine &tm) in SIInstrInfo() function in SIInstrInfo
31 const SIRegisterInfo &SIInstrInfo::getRegisterInfo() const in getRegisterInfo()
37 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, in getMovImmInstr()
63 bool SIInstrInfo::isMov(unsigned Opcode) const in isMov()
DSIInstrInfo.h23 class SIInstrInfo : public AMDGPUInstrInfo {
29 explicit SIInstrInfo(AMDGPUTargetMachine &tm);
DMakefile.sources20 SIInstrInfo.td \
72 SIInstrInfo.cpp \
DSIISelLowering.h24 const SIInstrInfo * TII;
DAMDGPUTargetMachine.cpp63 InstrInfo = new SIInstrInfo(*this); in AMDGPUTargetMachine()
DAMDGPUInstructions.td163 include "SIInstrInfo.td"
DSIISelLowering.cpp28 TII(static_cast<const SIInstrInfo*>(TM.getInstrInfo())) in SITargetLowering()
DSIInstrInfo.td1 //===-- SIInstrInfo.td - SI Instruction Encodings ---------*- tablegen -*--===//
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp30 SIInstrInfo::SIInstrInfo(const AMDGPUSubtarget &st) in SIInstrInfo() function in SIInstrInfo
77 bool SIInstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI, in isReallyTriviallyReMaterializable()
92 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr()
204 bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg, in getMemOpBaseRegImmOfs()
291 bool SIInstrInfo::shouldClusterLoads(MachineInstr *FirstLdSt, in shouldClusterLoads()
312 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
473 int SIInstrInfo::commuteOpcode(const MachineInstr &MI) const { in commuteOpcode()
493 unsigned SIInstrInfo::getMovOpcode(const TargetRegisterClass *DstRC) const { in getMovOpcode()
539 void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot()
629 void SIInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, in loadRegFromStackSlot()
[all …]
DSIShrinkInstructions.cpp86 static bool canShrink(MachineInstr &MI, const SIInstrInfo *TII, in canShrink()
138 static void foldImmediates(MachineInstr &MI, const SIInstrInfo *TII, in foldImmediates()
206 const SIInstrInfo *TII = in runOnMachineFunction()
207 static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
DSIFoldOperands.cpp142 const SIInstrInfo *TII) { in tryAddToFoldList()
203 const SIInstrInfo *TII, const SIRegisterInfo &TRI, in foldOperand()
305 const SIInstrInfo *TII = in runOnMachineFunction()
306 static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
DSIFixSGPRCopies.cpp178 const SIInstrInfo *TII, in foldVGPRCopyIntoRegSequence()
243 const SIInstrInfo *TII = in runOnMachineFunction()
244 static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
DSILowerI1Copies.cpp75 const SIInstrInfo *TII = in runOnMachineFunction()
76 static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
DSIRegisterInfo.cpp211 const SIInstrInfo *TII = in buildScratchLoadStore()
212 static_cast<const SIInstrInfo *>(MF->getSubtarget().getInstrInfo()); in buildScratchLoadStore()
263 const SIInstrInfo *TII = in eliminateFrameIndex()
264 static_cast<const SIInstrInfo *>(MF->getSubtarget().getInstrInfo()); in eliminateFrameIndex()
DSIFrameLowering.cpp66 const SIInstrInfo *TII = in emitPrologue()
67 static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitPrologue()
DAMDGPUSubtarget.cpp95 InstrInfo.reset(new SIInstrInfo(*this)); in AMDGPUSubtarget()
DCMakeLists.txt55 SIInstrInfo.cpp
DSILoadStoreOptimizer.cpp59 const SIInstrInfo *TII;
428 TII = static_cast<const SIInstrInfo *>(STM.getInstrInfo()); in runOnMachineFunction()
DSIInsertWaits.cpp57 const SIInstrInfo *TII;
458 TII = static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
DSIInstrInfo.h25 class SIInstrInfo : public AMDGPUInstrInfo {
77 explicit SIInstrInfo(const AMDGPUSubtarget &st);
DSIISelLowering.cpp532 const SIInstrInfo *TII = in shouldConvertConstantLoadToIntImm()
533 static_cast<const SIInstrInfo *>(Subtarget->getInstrInfo()); in shouldConvertConstantLoadToIntImm()
2165 const SIInstrInfo *TII = in analyzeImmediate()
2166 static_cast<const SIInstrInfo *>(Subtarget->getInstrInfo()); in analyzeImmediate()
2312 const SIInstrInfo *TII = in PostISelFolding()
2313 static_cast<const SIInstrInfo *>(Subtarget->getInstrInfo()); in PostISelFolding()
2330 const SIInstrInfo *TII = in AdjustInstrPostInstrSelection()
2331 static_cast<const SIInstrInfo *>(Subtarget->getInstrInfo()); in AdjustInstrPostInstrSelection()
2382 const SIInstrInfo *TII = in wrapAddr64Rsrc()
2383 static_cast<const SIInstrInfo *>(Subtarget->getInstrInfo()); in wrapAddr64Rsrc()
DSILowerControlFlow.cpp73 const SIInstrInfo *TII;
468 TII = static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
DAMDGPUISelDAGToDAG.cpp1063 const SIInstrInfo *TII = in SelectMUBUFOffset()
1064 static_cast<const SIInstrInfo *>(Subtarget->getInstrInfo()); in SelectMUBUFOffset()
/external/llvm/test/CodeGen/AMDGPU/
Dschedule-global-loads.ll25 ; Test for a crach in SIInstrInfo::areLoadsFromSameBasePtr() when checking
Dschedule-kernel-arg-loads.ll22 ; Test for a crash in SIInstrInfo::areLoadsFromSameBasePtr() when

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