/external/llvm/lib/CodeGen/ |
D | IntrinsicLowering.cpp | 178 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local 180 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16"); in LowerBSWAP() 188 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local 195 Tmp2 = Builder.CreateAnd(Tmp2, in LowerBSWAP() 199 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2"); in LowerBSWAP() 200 V = Builder.CreateOr(Tmp4, Tmp2, "bswap.i32"); in LowerBSWAP() 217 Value* Tmp2 = Builder.CreateLShr(V, in LowerBSWAP() local 243 Tmp2 = Builder.CreateAnd(Tmp2, in LowerBSWAP() 250 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or4"); in LowerBSWAP() 252 Tmp4 = Builder.CreateOr(Tmp4, Tmp2, "bswap.or6"); in LowerBSWAP()
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/external/pdfium/third_party/lcms2-2.6/src/ |
D | cmsintrp.c | 842 cmsUInt16Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval4Inputs() local 996 … Tmp2[OutChan] = (cmsUInt16Number) c0 + ROUND_FIXED_TO_INT(_cmsToFixedDomain(Rest)); in Eval4Inputs() 1002 Output[i] = LinearInterp(rk, Tmp1[i], Tmp2[i]); in Eval4Inputs() 1023 cmsFloat32Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval4InputsFloat() local 1043 TetrahedralInterpFloat(Input + 1, Tmp2, &p1); in Eval4InputsFloat() 1048 cmsFloat32Number y1 = Tmp2[i]; in Eval4InputsFloat() 1067 cmsUInt16Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval5Inputs() local 1089 Eval4Inputs(Input + 1, Tmp2, &p1); in Eval5Inputs() 1093 Output[i] = LinearInterp(rk, Tmp1[i], Tmp2[i]); in Eval5Inputs() 1110 cmsFloat32Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval5InputsFloat() local [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 601 SDValue Tmp2 = Val; in PerformInsertVectorEltInMemory() local 632 Ch = DAG.getTruncStore(Ch, dl, Tmp2, StackPtr2, MachinePointerInfo(), EltVT, in PerformInsertVectorEltInMemory() 1775 SDValue Tmp2 = SDValue(Node, 1); in ExpandDYNAMIC_STACKALLOC() local 1783 SDValue Size = Tmp2.getOperand(1); in ExpandDYNAMIC_STACKALLOC() 1795 Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, dl, true), in ExpandDYNAMIC_STACKALLOC() 1799 Results.push_back(Tmp2); in ExpandDYNAMIC_STACKALLOC() 2817 SDValue Tmp, Tmp2; in ExpandBITREVERSE() local 2821 Tmp2 = in ExpandBITREVERSE() 2824 Tmp2 = in ExpandBITREVERSE() 2829 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Shift, dl, VT)); in ExpandBITREVERSE() [all …]
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D | SelectionDAG.cpp | 1844 SDValue Tmp2 = Node->getOperand(1); in expandVAArg() local 1848 getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1, Tmp2, in expandVAArg() 1868 Tmp1 = getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2, in expandVAArg() 2527 unsigned Tmp, Tmp2; in ComputeNumSignBits() local 2558 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); in ComputeNumSignBits() 2559 return std::max(Tmp, Tmp2); in ComputeNumSignBits() 2584 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); in ComputeNumSignBits() 2585 FirstAnswer = std::min(Tmp, Tmp2); in ComputeNumSignBits() 2595 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); in ComputeNumSignBits() 2596 return std::min(Tmp, Tmp2); in ComputeNumSignBits() [all …]
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D | LegalizeFloatTypes.cpp | 1531 SDValue Tmp1, Tmp2, Tmp3; in FloatExpandSetCCOperands() local 1534 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), in FloatExpandSetCCOperands() 1536 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands() 1539 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands() 1541 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
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D | LegalizeIntegerTypes.cpp | 2760 SDValue Tmp1, Tmp2; in IntegerExpandSetCCOperands() local 2770 Tmp2 = TLI.SimplifySetCC(getSetCCResultType(LHSHi.getValueType()), in IntegerExpandSetCCOperands() 2772 if (!Tmp2.getNode()) in IntegerExpandSetCCOperands() 2773 Tmp2 = DAG.getNode(ISD::SETCC, dl, in IntegerExpandSetCCOperands() 2778 ConstantSDNode *Tmp2C = dyn_cast<ConstantSDNode>(Tmp2.getNode()); in IntegerExpandSetCCOperands() 2789 NewLHS = Tmp2; in IntegerExpandSetCCOperands() 2842 NewLHS, Tmp1, Tmp2); in IntegerExpandSetCCOperands()
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/external/llvm/lib/Transforms/Utils/ |
D | IntegerDivision.cpp | 133 Value *Tmp2 = Builder.CreateXor(Tmp, Dividend); in generateSignedDivisionCode() local 134 Value *U_Dvnd = Builder.CreateSub(Tmp2, Tmp); in generateSignedDivisionCode() 273 Value *Tmp2 = Builder.CreateSub(MSB, SR); in generateUnsignedDivisionCode() local 274 Value *Q = Builder.CreateShl(Dividend, Tmp2); in generateUnsignedDivisionCode()
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/external/clang/lib/StaticAnalyzer/Core/ |
D | ExprEngineC.cpp | 31 ExplodedNodeSet Tmp2; in VisitBinaryOperator() local 56 evalStore(Tmp2, B, LHS, *it, state->BindExpr(B, LCtx, ExprVal), in VisitBinaryOperator() 62 StmtNodeBuilder Bldr(*it, Tmp2, *currBldrCtx); in VisitBinaryOperator() 179 evalStore(Tmp2, B, LHS, *I, state, location, LHSVal); in VisitBinaryOperator() 184 getCheckerManager().runCheckersForPostStmt(Dst, Tmp2, B, *this); in VisitBinaryOperator()
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D | CheckerManager.cpp | 108 ExplodedNodeSet Tmp1, Tmp2; in expandGraphWithCheckers() local 116 CurrSet = (PrevSet == &Tmp1) ? &Tmp2 : &Tmp1; in expandGraphWithCheckers()
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/external/llvm/lib/Analysis/ |
D | ValueTracking.cpp | 2149 unsigned Tmp, Tmp2; in ComputeNumSignBits() local 2233 Tmp2 = ShAmt->getZExtValue(); in ComputeNumSignBits() 2234 if (Tmp2 >= TyBits || // Bad shift. in ComputeNumSignBits() 2235 Tmp2 >= Tmp) break; // Shifted all sign bits out. in ComputeNumSignBits() 2236 return Tmp - Tmp2; in ComputeNumSignBits() 2246 Tmp2 = ComputeNumSignBits(U->getOperand(1), DL, Depth + 1, Q); in ComputeNumSignBits() 2247 FirstAnswer = std::min(Tmp, Tmp2); in ComputeNumSignBits() 2257 Tmp2 = ComputeNumSignBits(U->getOperand(2), DL, Depth + 1, Q); in ComputeNumSignBits() 2258 return std::min(Tmp, Tmp2); in ComputeNumSignBits() 2284 Tmp2 = ComputeNumSignBits(U->getOperand(1), DL, Depth + 1, Q); in ComputeNumSignBits() [all …]
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/external/webrtc/webrtc/modules/audio_coding/codecs/isac/main/source/ |
D | structs.h | 254 double Tmp2[MAXFFTSIZE]; member
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D | fft.c | 342 Cos = (REAL *) fftstate->Tmp2; in FFTRADIX()
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/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 2500 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local 2501 bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select() 2504 foldedLoad = tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select() 2515 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select() 2645 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local 2646 bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select() 2653 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Move, Chain; in Select() local 2654 if (tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in Select() 2655 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N0.getOperand(0) }; in Select() 2709 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonHardwareLoops.cpp | 1922 SmallVector<MachineOperand,1> Tmp2; in createPreheaderForLoop() local 1930 Tmp2.clear(); in createPreheaderForLoop() 1931 bool NotAnalyzed = TII->AnalyzeBranch(*PB, TB, FB, Tmp2, false); in createPreheaderForLoop() 1934 if (TB != Header && (Tmp2.empty() || FB != Header)) in createPreheaderForLoop() 1943 bool LatchNotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Tmp2, false); in createPreheaderForLoop()
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D | HexagonSplitDouble.cpp | 663 auto *Tmp2 = MF.getMachineMemOperand(Ptr, F, 4/*size*/, std::min(A, 4)); in splitMemRef() local 664 HighI->addMemOperand(MF, Tmp2); in splitMemRef()
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D | HexagonISelLowering.cpp | 1321 SDValue Tmp2 = DAG.getNode(ISD::OR, DL, MVT::i32, Tmp1, Loads[0]); in LowerLOAD() local 1345 Result = DAG.getNode(HexagonISD::COMBINE, DL, MVT::i64, Tmp4, Tmp2); in LowerLOAD()
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/external/llvm/lib/Support/ |
D | APInt.cpp | 799 uint16_t Tmp2 = uint16_t(VAL); in byteSwap() local 800 Tmp2 = ByteSwap_16(Tmp2); in byteSwap() 801 return APInt(BitWidth, (uint64_t(Tmp2) << 32) | Tmp1); in byteSwap()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 2000 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1); in LowerFTRUNC() local 2002 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2); in LowerFTRUNC() 2018 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign); in LowerFRINT() local 2029 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2); in LowerFRINT() 2101 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, Tmp1, in LowerFROUND64() local 2103 SDValue K = DAG.getNode(ISD::ADD, SL, MVT::i64, L, Tmp2); in LowerFROUND64()
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/external/clang/lib/CodeGen/ |
D | CGExprComplex.cpp | 780 llvm::Value *Tmp2 = Builder.CreateMul(LHSi, RHSi); // b*d in EmitBinDiv() local 781 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd in EmitBinDiv()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 1732 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts() local 1733 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts() 1794 SDValue Tmp2 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts() local 1795 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts() 2002 SDValue Tmp2 = ST->getBasePtr(); in LowerSTOREi1() local 2009 SDValue Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, in LowerSTOREi1()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 561 SDValue Tmp1, Tmp2; in SelectBitfieldInsert() local 3055 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local 3057 SDValue(Tmp2, 0)); in Select() 3069 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local 3071 SDValue(Tmp2, 0)); in Select()
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D | PPCISelLowering.cpp | 6656 SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt); in LowerSHL_PARTS() local 6658 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3); in LowerSHL_PARTS() 6685 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); in LowerSRL_PARTS() local 6687 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRL_PARTS() 6713 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); in LowerSRA_PARTS() local 6715 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRA_PARTS()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 2755 SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned) in Select() local 2758 SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag }; in Select()
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D | ARMISelLowering.cpp | 4273 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts() local 4274 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts() 4307 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() local 4310 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 5068 unsigned Tmp2 = MRI.createVirtualRegister(RC); in emitAtomicLoadBinary() local 5069 BuildMI(MBB, DL, TII->get(SystemZ::LCGR), Tmp2).addReg(Tmp); in emitAtomicLoadBinary() 5071 .addReg(Tmp2).addImm(-1); in emitAtomicLoadBinary()
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