| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 834 MCInst TmpInst; in ProcessInstruction() local
835 TmpInst.setOpcode((Opcode == PPC::DCBTx || Opcode == PPC::DCBTT) ? in ProcessInstruction()
837 TmpInst.addOperand(MCOperand::createImm( in ProcessInstruction()
839 TmpInst.addOperand(Inst.getOperand(0)); in ProcessInstruction()
840 TmpInst.addOperand(Inst.getOperand(1)); in ProcessInstruction()
841 Inst = TmpInst; in ProcessInstruction()
846 MCInst TmpInst; in ProcessInstruction() local
847 TmpInst.setOpcode(PPC::DCBT); in ProcessInstruction()
848 TmpInst.addOperand(Inst.getOperand(2)); in ProcessInstruction()
849 TmpInst.addOperand(Inst.getOperand(0)); in ProcessInstruction()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 6679 MCInst TmpInst; in processInstruction() local
6680 TmpInst.setOpcode(Opcode); in processInstruction()
6681 TmpInst.addOperand(Inst.getOperand(0)); in processInstruction()
6682 TmpInst.addOperand(Inst.getOperand(1)); in processInstruction()
6683 TmpInst.addOperand(Inst.getOperand(1)); in processInstruction()
6684 TmpInst.addOperand(MCOperand::createReg(0)); in processInstruction()
6685 TmpInst.addOperand(MCOperand::createImm(0)); in processInstruction()
6686 TmpInst.addOperand(Inst.getOperand(2)); in processInstruction()
6687 TmpInst.addOperand(Inst.getOperand(3)); in processInstruction()
6688 Inst = TmpInst; in processInstruction()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonAsmPrinter.cpp | 277 MCInst TmpInst; in HexagonProcessInstruction() local
279 TmpInst.setOpcode(Hexagon::L2_loadrdgp); in HexagonProcessInstruction()
280 TmpInst.addOperand(Reg); in HexagonProcessInstruction()
281 TmpInst.addOperand(MCOperand::createExpr( in HexagonProcessInstruction()
283 MappedInst = TmpInst; in HexagonProcessInstruction()
296 MCInst TmpInst; in HexagonProcessInstruction() local
298 TmpInst.setOpcode(Hexagon::L2_loadrigp); in HexagonProcessInstruction()
299 TmpInst.addOperand(Reg); in HexagonProcessInstruction()
300 TmpInst.addOperand(MCOperand::createExpr( in HexagonProcessInstruction()
302 MappedInst = TmpInst; in HexagonProcessInstruction()
[all …]
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| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 1463 MCInst TmpInst; in makeCombineInst() local
1464 TmpInst.setOpcode(opCode); in makeCombineInst()
1465 TmpInst.addOperand(Rdd); in makeCombineInst()
1466 TmpInst.addOperand(MO1); in makeCombineInst()
1467 TmpInst.addOperand(MO2); in makeCombineInst()
1469 return TmpInst; in makeCombineInst()
1571 MCInst TmpInst; in processInstruction() local
1574 TmpInst.setOpcode(Hexagon::C2_cmpeq); in processInstruction()
1575 TmpInst.addOperand(Pd); in processInstruction()
1576 TmpInst.addOperand(Rt); in processInstruction()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCAsmPrinter.cpp | 492 MCInst TmpInst; in EmitInstruction() local
552 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); in EmitInstruction()
555 TmpInst.setOpcode(PPC::LWZ); in EmitInstruction()
562 const MCOperand TR = TmpInst.getOperand(1); in EmitInstruction()
563 const MCOperand PICR = TmpInst.getOperand(0); in EmitInstruction()
566 TmpInst.getOperand(1) = in EmitInstruction()
568 TmpInst.getOperand(0) = TR; in EmitInstruction()
569 TmpInst.getOperand(2) = PICR; in EmitInstruction()
570 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
572 TmpInst.setOpcode(PPC::ADD4); in EmitInstruction()
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 1377 MCInst TmpInst; in EmitInstruction() local
1378 TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16); in EmitInstruction()
1379 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in EmitInstruction()
1396 TmpInst.addOperand(MCOperand::createExpr(PCRelExpr)); in EmitInstruction()
1399 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in EmitInstruction()
1400 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1402 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1403 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
1408 MCInst TmpInst; in EmitInstruction() local
1409 TmpInst.setOpcode(Opc == ARM::MOVTi16_ga_pcrel in EmitInstruction()
[all …]
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 760 MCInst TmpInst; in emitDirectiveCpLoad() local
761 TmpInst.setOpcode(Mips::LUi); in emitDirectiveCpLoad()
762 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad()
765 TmpInst.addOperand(MCOperand::createExpr(HiSym)); in emitDirectiveCpLoad()
766 getStreamer().EmitInstruction(TmpInst, STI); in emitDirectiveCpLoad()
768 TmpInst.clear(); in emitDirectiveCpLoad()
770 TmpInst.setOpcode(Mips::ADDiu); in emitDirectiveCpLoad()
771 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad()
772 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad()
775 TmpInst.addOperand(MCOperand::createExpr(LoSym)); in emitDirectiveCpLoad()
[all …]
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| D | MipsMCCodeEmitter.cpp | 157 MCInst TmpInst = MI; in encodeInstruction() local
164 LowerLargeShift(TmpInst); in encodeInstruction()
169 LowerDextDins(TmpInst); in encodeInstruction()
173 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction()
178 unsigned Opcode = TmpInst.getOpcode(); in encodeInstruction()
202 TmpInst.setOpcode (NewOpcode); in encodeInstruction()
203 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction()
207 const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); in encodeInstruction()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUMCInstLower.cpp | 106 MCInst TmpInst; in EmitInstruction() local
107 MCInstLowering.lower(MI, TmpInst); in EmitInstruction()
108 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
119 InstPrinter.printInst(&TmpInst, DisasmStream, StringRef(), in EmitInstruction()
129 InstEmitter.encodeInstruction(TmpInst, CodeStream, Fixups, in EmitInstruction()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AsmPrinter.cpp | 468 MCInst TmpInst; in EmitInstruction() local
469 TmpInst.setOpcode(AArch64::BR); in EmitInstruction()
470 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in EmitInstruction()
471 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
477 MCInst TmpInst; in EmitInstruction() local
478 TmpInst.setOpcode(AArch64::B); in EmitInstruction()
479 TmpInst.addOperand(Dest); in EmitInstruction()
480 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
546 MCInst TmpInst; in EmitInstruction() local
547 MCInstLowering.Lower(MI, TmpInst); in EmitInstruction()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFAsmPrinter.cpp | 79 MCInst TmpInst; in EmitInstruction() local
80 MCInstLowering.Lower(MI, TmpInst); in EmitInstruction()
81 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUMCInstLower.cpp | 78 MCInst TmpInst; in EmitInstruction() local
79 MCInstLowering.lower(MI, TmpInst); in EmitInstruction()
80 OutStreamer.EmitInstruction(TmpInst); in EmitInstruction()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430AsmPrinter.cpp | 153 MCInst TmpInst; in EmitInstruction() local
154 MCInstLowering.Lower(MI, TmpInst); in EmitInstruction()
155 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
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| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 472 MCInst TmpInst; in expandSET() local
474 TmpInst.setLoc(IDLoc); in expandSET()
475 TmpInst.setOpcode(SP::SETHIi); in expandSET()
476 TmpInst.addOperand(MCRegOp); in expandSET()
477 TmpInst.addOperand(MCOperand::createExpr(Expr)); in expandSET()
478 Instructions.push_back(TmpInst); in expandSET()
493 MCInst TmpInst; in expandSET() local
499 TmpInst.setLoc(IDLoc); in expandSET()
500 TmpInst.setOpcode(SP::ORri); in expandSET()
501 TmpInst.addOperand(MCRegOp); in expandSET()
[all …]
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyAsmPrinter.cpp | 217 MCInst TmpInst; in EmitInstruction() local
218 MCInstLowering.Lower(MI, TmpInst); in EmitInstruction()
219 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreAsmPrinter.cpp | 296 MCInst TmpInst; in EmitInstruction() local
297 MCInstLowering.Lower(MI, TmpInst); in EmitInstruction()
299 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 273 MCInst TmpInst; in EmitInstruction() local
274 LowerSparcMachineInstrToMCInst(&*I, TmpInst, *this); in EmitInstruction()
275 EmitToStreamer(*OutStreamer, TmpInst); in EmitInstruction()
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 1407 MCInst TmpInst; in EmitInstruction() local
1408 MCInstLowering.Lower(MI, TmpInst); in EmitInstruction()
1416 SMShadowTracker.count(TmpInst, getSubtargetInfo()); in EmitInstruction()
1421 OutStreamer->EmitInstruction(TmpInst, getSubtargetInfo()); in EmitInstruction()
1425 EmitAndCountInstruction(TmpInst); in EmitInstruction()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3440 MCInst TmpInst; in expandDRotationImm() local
|