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Searched refs:VERT_BIT_COLOR0 (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_tcl.c295 VERT_BIT_COLOR0, in radeonEnsureEmitSize()
360 GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0; in radeon_run_tcl_render()
Dradeon_maos_arrays.c191 if (inputs & VERT_BIT_COLOR0) { in radeonEmitArrays()
Dradeon_maos_verts.c337 if (inputs & VERT_BIT_COLOR0) { in radeonEmitArrays()
/external/mesa3d/src/mesa/x86/
Dgen_matypes.c141 DEFINE( "VERT_BIT_RGBA ", VERT_BIT_COLOR0 ); in main()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_vertprog.c423 ~(VERT_BIT_POS | VERT_BIT_NORMAL | VERT_BIT_COLOR0 | VERT_BIT_COLOR1 | in r200_translate_vertex_program()
521 if (mesa_vp->Base.InputsRead & VERT_BIT_COLOR0) { in r200_translate_vertex_program()
/external/mesa3d/src/mesa/program/
Dprogramopt.c665 if (prog->Base.InputsRead & VERT_BIT_COLOR0) in _mesa_nop_vertex_program()
/external/mesa3d/docs/
DRELNOTES-4.1215 For example: VERT_RGBA is now VERT_BIT_COLOR0 and
/external/mesa3d/src/mesa/main/
Dffvertex_prog.c135 if ((key->varying_vp_inputs & VERT_BIT_COLOR0) && in check_active_shininess()
869 if (p->state->varying_vp_inputs & VERT_BIT_COLOR0) { in set_material_flags()
Dff_fragment_shader.cpp369 if (varying_inputs & VERT_BIT_COLOR0) in get_fp_input_mask()
Denable.c72 flag = VERT_BIT_COLOR0; in client_state()
Dmtypes.h174 #define VERT_BIT_COLOR0 BITFIELD64_BIT(VERT_ATTRIB_COLOR0) macro