Searched refs:VRC (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | MachineSSAUpdater.cpp | 59 VRC = MRI->getRegClass(VR); in Initialize()
153 VRC, MRI, TII); in GetValueInMiddleOfBlock()
189 Loc, VRC, MRI, TII); in GetValueInMiddleOfBlock()
290 Updater->VRC, Updater->MRI, in GetUndefVal()
301 Updater->VRC, Updater->MRI, in CreateEmptyPHI()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineSSAUpdater.h | 48 const TargetRegisterClass *VRC; variable
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 1693 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(RC); in legalizeOpWithMove() local
1694 if (RI.getCommonSubClass(&AMDGPU::VReg_64RegClass, VRC)) in legalizeOpWithMove()
1695 VRC = &AMDGPU::VReg_64RegClass; in legalizeOpWithMove()
1697 VRC = &AMDGPU::VGPR_32RegClass; in legalizeOpWithMove()
1699 unsigned Reg = MRI.createVirtualRegister(VRC); in legalizeOpWithMove()
1982 const TargetRegisterClass *RC = nullptr, *SRC = nullptr, *VRC = nullptr; in legalizeOperands() local
1990 VRC = OpRC; in legalizeOperands()
1999 if (VRC || !RI.isSGPRClass(getOpRegClass(*MI, 0))) { in legalizeOperands()
2000 if (!VRC) { in legalizeOperands()
2002 VRC = RI.getEquivalentVGPRClass(SRC); in legalizeOperands()
[all …]
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 444 const TargetRegisterClass *VRC = MRI->getRegClass(VReg); in ConstrainForSubReg() local
445 const TargetRegisterClass *RC = TRI->getSubClassWithSubReg(VRC, SubIdx); in ConstrainForSubReg()
449 if (RC && RC != VRC) in ConstrainForSubReg()
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