/external/llvm/unittests/ADT/ |
D | APIntTest.cpp | 45 EXPECT_EQ(128u, Minus1.countTrailingOnes()); in TEST() 90 EXPECT_EQ(128u, u128max.countTrailingOnes()); in TEST() 98 EXPECT_EQ(64u, u64max.countTrailingOnes()); in TEST() 107 EXPECT_EQ(0u, zero.countTrailingOnes()); in TEST() 117 EXPECT_EQ(1u, one.countTrailingOnes()); in TEST()
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMUnwindOpAsm.cpp | 76 uint32_t Range = countTrailingOnes(Mask >> 5); // Exclude r4. in EmitRegSave()
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AddressingModes.h | 240 CTO = countTrailingOnes(Imm >> I); in processLogicalImmediate() 248 CTO = CLO + countTrailingOnes(Imm) - (64 - Size); in processLogicalImmediate()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonGenExtract.cpp | 168 uint32_t T = M.countTrailingOnes(); in INITIALIZE_PASS_DEPENDENCY()
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/external/llvm/lib/Target/X86/ |
D | X86FloatingPoint.cpp | 936 unsigned N = countTrailingOnes(STReturns); in handleCall() 1412 unsigned NumSTUses = countTrailingOnes(STUses); in handleSpecialFP() 1419 unsigned NumSTDefs = countTrailingOnes(STDefs); in handleSpecialFP() 1429 unsigned NumSTPopped = countTrailingOnes(STPopped); in handleSpecialFP()
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D | X86InstrCompiler.td | 1587 return countTrailingOnes<uint64_t>(Imm) >= 5; 1590 return countTrailingOnes<uint64_t>(Imm) >= 6;
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D | X86ISelDAGToDAG.cpp | 1048 if (countTrailingOnes(Mask >> MaskTZ) + MaskTZ + MaskLZ != 64) return true; in foldMaskAndShiftToScale()
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D | X86InstrInfo.td | 2289 return getI8Imm(countTrailingOnes(N->getZExtValue()), SDLoc(N)); 2293 return isMask_64(Imm) && (countTrailingOnes<uint64_t>(Imm) > 32);
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/external/llvm/include/llvm/ADT/ |
D | APInt.h | 1404 unsigned countTrailingOnes() const { in countTrailingOnes() function 1406 return llvm::countTrailingOnes(VAL); in countTrailingOnes()
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/external/llvm/lib/Transforms/Scalar/ |
D | AlignmentFromAssumptions.cpp | 256 unsigned TrailingOnes = MaskSCEV->getAPInt().countTrailingOnes(); in extractAlignmentInfo()
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/external/llvm/lib/Analysis/ |
D | ValueTracking.cpp | 347 unsigned TrailZ = KnownZero.countTrailingOnes() + in computeKnownBitsMul() 348 KnownZero2.countTrailingOnes(); in computeKnownBitsMul() 1093 if (KnownOne3.countTrailingOnes() > 0) in computeKnownBitsFromOperator() 1353 unsigned TrailZ = LocalKnownZero.countTrailingOnes(); in computeKnownBitsFromOperator() 1388 LocalKnownZero.countTrailingOnes())); in computeKnownBitsFromOperator() 1434 std::min(KnownZero2.countTrailingOnes(), in computeKnownBitsFromOperator() 1435 KnownZero3.countTrailingOnes())); in computeKnownBitsFromOperator() 1985 if (KnownZero.countTrailingOnes() >= ShiftVal) in isKnownNonZero()
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D | ScalarEvolution.cpp | 4176 return Zeros.countTrailingOnes(); in GetMinTrailingZeros()
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/external/llvm/include/llvm/Support/ |
D | MathExtras.h | 407 std::size_t countTrailingOnes(T Value, ZeroBehavior ZB = ZB_Width) {
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 126 if (CN->getAPIntValue().countTrailingOnes() < EltSize) in isBuildVectorAllOnes() 129 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) in isBuildVectorAllOnes() 2104 unsigned TrailZ = KnownZero.countTrailingOnes() + in computeKnownBits() 2105 KnownZero2.countTrailingOnes(); in computeKnownBits() 2394 unsigned KnownZeroLow = KnownZero2.countTrailingOnes(); in computeKnownBits() 2400 KnownZero2.countTrailingOnes()); in computeKnownBits() 7073 unsigned AlignBits = KnownZero.countTrailingOnes(); in InferPtrAlignment()
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D | TargetLowering.cpp | 1353 MinBits = C->getAPIntValue().countTrailingOnes(); in SimplifySetCC() 1772 ShiftBits = C1.countTrailingOnes(); in SimplifySetCC()
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D | SelectionDAGBuilder.cpp | 2063 ShiftOp, DAG.getConstant(countTrailingOnes(B.Mask), dl, VT), in visitBitTestCase()
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D | DAGCombiner.cpp | 10648 if (countTrailingOnes(NotMask >> NotMaskTZ) + NotMaskTZ + NotMaskLZ != 64) in CheckForMaskedLoad()
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/external/llvm/lib/Transforms/Utils/ |
D | Local.cpp | 997 unsigned TrailZ = KnownZero.countTrailingOnes(); in getOrEnforceKnownAlignment()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1497 MSB = Srl_imm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(And_imm) in isBitfieldExtractOpFromAnd() 1498 : countTrailingOnes<uint64_t>(And_imm)) - in isBitfieldExtractOpFromAnd() 1952 MaskWidth = countTrailingOnes(NonZeroBits >> ShiftAmount); in isBitfieldPositioningOp()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.cpp | 4822 uint64_t NumBits = countTrailingOnes(MaskVal); in SelectBFE() 4886 NumBits = countTrailingOnes(MaskVal) - ShiftAmt; in SelectBFE() 4889 unsigned NumOnes = countTrailingOnes(MaskVal >> NumZeros); in SelectBFE()
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/external/llvm/lib/Support/ |
D | APInt.cpp | 767 Count += llvm::countTrailingOnes(pVal[i]); in countTrailingOnesSlowCase()
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 419 return KnownZero.countTrailingOnes() >= 2; in isWordAligned()
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineCompares.cpp | 2566 unsigned trailingOnes = RHS.countTrailingOnes(); in DemandedBitsLHSMask()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 2606 MB = 64 - countTrailingOnes(Imm64); in Select()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 2344 unsigned Width = countTrailingOnes(And_imm) - 1; in SelectV6T2BitfieldExtractOp()
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