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Searched refs:cvttss2si (Results 1 – 25 of 29) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dvec_fp_to_int.ll492 ; SSE-NEXT: cvttss2si %xmm0, %rax
495 ; SSE-NEXT: cvttss2si %xmm0, %rax
518 ; SSE-NEXT: cvttss2si %xmm0, %rax
521 ; SSE-NEXT: cvttss2si %xmm0, %rax
559 ; SSE-NEXT: cvttss2si %xmm0, %rax
563 ; SSE-NEXT: cvttss2si %xmm1, %rax
568 ; SSE-NEXT: cvttss2si %xmm1, %rax
571 ; SSE-NEXT: cvttss2si %xmm0, %rax
602 ; SSE-NEXT: cvttss2si %xmm0, %rax
606 ; SSE-NEXT: cvttss2si %xmm1, %rax
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Dfast-isel-sse12-fptoint.ll6 ; SSE: cvttss2si %xmm0, %eax
13 %5 = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %4)
16 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
20 ; SSE: cvttss2si %xmm0, %rax
Dscalar-fp-to-i64.ll40 ; SSE2_64: cvttss2si
44 ; SSE3_64: cvttss2si
59 ; SSE2_64: cvttss2si
61 ; SSE3_64: cvttss2si
Dvec_ss_load_fold.ll15 %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
30 %tmp = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
47 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
Dhalf.ll81 ; CHECK-LIBCALL-NEXT: cvttss2si %xmm0, %rax
126 ; CHECK-LIBCALL-NEXT: cvttss2si [[REG2]], [[REG3:%[a-z0-9]+]]
129 ; CHECK-LIBCALL-NEXT: cvttss2si %xmm0, [[REG5:%[a-z0-9]+]]
Dsse-intrinsics-x86.ll105 ; CHECK: cvttss2si
106 %res = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0) ; <i32> [#uses=1]
109 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
Dstack-folding-fp-sse42.ll494 ;CHECK: cvttss2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
502 ;CHECK: cvttss2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 16-byte Folded Reload
504 %2 = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0)
507 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
511 ;CHECK: cvttss2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 4-byte Folded Reload
519 ;CHECK: cvttss2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 16-byte Folded Reload
Dstack-folding-fp-avx1.ll736 %2 = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0)
739 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
751 ;CHECK: cvttss2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 16-byte Folded Reload
/external/llvm/test/Transforms/ConstProp/
Dcalls.ll185 …%i1 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 1.75, float undef, float undef, flo…
204 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
/external/llvm/test/Transforms/InstCombine/
Dvec_demanded_elts.ll20 %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
59 %tmp2 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %v23)
134 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
/external/valgrind/none/tests/amd64/
Dinsn_sse.def57 cvttss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
58 cvttss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[56]
/external/valgrind/none/tests/x86/
Dinsn_sse.def57 cvttss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
58 cvttss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[56]
/external/llvm/test/MC/X86/
Dx86-32-coverage.s5565 cvttss2si 0xdeadbeef(%ebx,%ecx,8),%ecx
5569 cvttss2si 0x45,%ecx
5573 cvttss2si 0x7eed,%ecx
5577 cvttss2si 0xbabecafe,%ecx
5581 cvttss2si 0x12345678,%ecx
5585 cvttss2si %xmm5,%ecx
/external/v8/src/ia32/
Dassembler-ia32.h953 void cvttss2si(Register dst, const Operand& src);
954 void cvttss2si(Register dst, XMMRegister src) { in cvttss2si() function
955 cvttss2si(dst, Operand(src)); in cvttss2si()
Dassembler-ia32.cc1976 void Assembler::cvttss2si(Register dst, const Operand& src) { in cvttss2si() function in v8::internal::Assembler
/external/v8/test/cctest/
Dtest-disasm-x64.cc384 __ cvttss2si(rdx, Operand(rbx, rcx, times_4, 10000)); in TEST() local
385 __ cvttss2si(rdx, xmm1); in TEST() local
Dtest-assembler-ia32.cc166 __ cvttss2si(eax, Operand(esp, 4)); in TEST() local
580 __ cvttss2si(eax, xmm2); in TEST() local
Dtest-disasm-ia32.cc431 __ cvttss2si(edx, Operand(ebx, ecx, times_4, 10000)); in TEST() local
Dtest-assembler-x64.cc731 __ cvttss2si(rax, xmm2); in TEST() local
/external/v8/src/x64/
Dassembler-x64.h1026 void cvttss2si(Register dst, const Operand& src);
1027 void cvttss2si(Register dst, XMMRegister src);
Dassembler-x64.cc3072 void Assembler::cvttss2si(Register dst, const Operand& src) { in cvttss2si() function in v8::internal::Assembler
3083 void Assembler::cvttss2si(Register dst, XMMRegister src) { in cvttss2si() function in v8::internal::Assembler
/external/llvm/lib/Target/X86/
DX86InstrSSE.td1508 "cvttss2si\t{$src, $dst|$dst, $src}",
1512 "cvttss2si\t{$src, $dst|$dst, $src}",
1580 "cvttss2si\t{$src, $dst|$dst, $src}",
1583 "cvttss2si\t{$src, $dst|$dst, $src}",
1604 def : InstAlias<"cvttss2si{l}\t{$src, $dst|$dst, $src}",
1606 def : InstAlias<"cvttss2si{l}\t{$src, $dst|$dst, $src}",
1612 def : InstAlias<"cvttss2si{q}\t{$src, $dst|$dst, $src}",
1614 def : InstAlias<"cvttss2si{q}\t{$src, $dst|$dst, $src}",
1714 ssmem, sse_load_f32, "cvttss2si",
1718 "cvttss2si", SSE_CVT_SS2SI_64>,
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/external/elfutils/tests/
Dtestfile44.expect.bz21testfile44.o: elf32-elf_i386 2 3Disassembly of section .text: 4 5 0 ...
Dtestfile45.expect.bz2
/external/elfutils/libcpu/defs/
Di386660 11110011,00001111,00101100,{Mod}{reg}{R_m}:cvttss2si {Mod}{R_m},{reg}

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