| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrFormats.td | 13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
18 dag OutOperandList = outs;
19 dag InOperandList = ins;
27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
36 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
45 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
50 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
61 class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr,
62 list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> {
66 class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrFormatsV60.td | 42 class CVI_VA_Resource<dag outs, dag ins, string asmstr,
43 list<dag> pattern = [], string cstr = "",
48 class CVI_VA_DV_Resource<dag outs, dag ins, string asmstr,
49 list<dag> pattern = [], string cstr = "",
54 class CVI_VX_Resource_long<dag outs, dag ins, string asmstr,
55 list<dag> pattern = [], string cstr = "",
60 class CVI_VX_Resource_late<dag outs, dag ins, string asmstr,
61 list<dag> pattern = [], string cstr = "",
66 class CVI_VX_Resource<dag outs, dag ins, string asmstr,
67 list<dag> pattern = [], string cstr = "",
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| D | HexagonInstrFormats.td | 79 class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern,
84 dag OutOperandList = outs;
85 dag InOperandList = ins;
210 class LDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
215 class LDInst2<dag outs, dag ins, string asmstr, list<dag> pattern = [],
219 class CONSTLDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
225 class LDInstPost<dag outs, dag ins, string asmstr, list<dag> pattern = [],
230 class LD0Inst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
235 class LD1Inst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
243 class STInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
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| D | HexagonInstrFormatsV4.td | 42 class InstDuplex<bits<4> iClass, list<dag> pattern = [],
49 dag OutOperandList = (outs);
50 dag InOperandList = (ins);
108 class NVInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
112 class NVInst_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
117 class NVInstPost_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
123 class NVInstPI_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
128 class NCJInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
133 class MEMInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
138 class MEMInst_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
[all …]
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrFormats.td | 54 class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f,
60 dag OutOperandList = outs;
61 dag InOperandList = ins;
78 dag outs, dag ins, string asmstr, list<dag> pattern>
93 dag outs, dag ins, string asmstr, list<dag> pattern>
97 dag outs, dag ins, string asmstr, list<dag> pattern>
101 dag outs, dag ins, string asmstr, list<dag> pattern>
105 dag outs, dag ins, string asmstr, list<dag> pattern>
109 dag outs, dag ins, string asmstr, list<dag> pattern>
113 dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrFormats.td | 14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
68 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
103 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
104 InstrItinClass itin, list<dag> pattern>
115 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
132 class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL,
141 dag OOL, dag IOL, string asmstr>
153 dag OOL, dag IOL, string asmstr>
167 dag OOL, dag IOL, string asmstr>
181 dag OOL, dag IOL, string asmstr, InstrItinClass itin,
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrFormats.td | 10 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern>
20 dag OutOperandList = outs;
21 dag InOperandList = ins;
34 class F2<dag outs, dag ins, string asmstr, list<dag> pattern>
45 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern>
54 class F2_2<bits<3> op2Val, bit annul, dag outs, dag ins, string asmstr,
55 list<dag> pattern> : F2<outs, ins, asmstr, pattern> {
64 dag outs, dag ins, string asmstr, list<dag> pattern>
81 dag outs, dag ins, string asmstr, list<dag> pattern>
103 class F3<dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrFormats.td | 220 class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
232 dag OutOperandList = outs;
233 dag InOperandList = ins;
335 class PseudoI<dag oops, dag iops, list<dag> pattern>
340 class I<bits<8> o, Format f, dag outs, dag ins, string asm,
341 list<dag> pattern, InstrItinClass itin = NoItinerary,
347 class Ii8 <bits<8> o, Format f, dag outs, dag ins, string asm,
348 list<dag> pattern, InstrItinClass itin = NoItinerary,
354 class Ii8PCRel<bits<8> o, Format f, dag outs, dag ins, string asm,
355 list<dag> pattern, InstrItinClass itin = NoItinerary>
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrFormats.td | 252 class ARMInstAlias<string Asm, dag Result, bit Emit = 0b1>
254 class tInstAlias<string Asm, dag Result, bit Emit = 0b1>
256 class t2InstAlias<string Asm, dag Result, bit Emit = 0b1>
258 class VFP2InstAlias<string Asm, dag Result, bit Emit = 0b1>
260 class VFP2DPInstAlias<string Asm, dag Result, bit Emit = 0b1>
262 class VFP3InstAlias<string Asm, dag Result, bit Emit = 0b1>
264 class NEONInstAlias<string Asm, dag Result, bit Emit = 0b1>
342 class AsmPseudoInst<string asm, dag iops, dag oops = (outs)>
353 class ARMAsmPseudo<string asm, dag iops, dag oops = (outs)>
355 class tAsmPseudo<string asm, dag iops, dag oops = (outs)>
[all …]
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 36 class MipsInst16_Base<dag outs, dag ins, string asmstr, list<dag> pattern,
55 class MipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
72 class MipsInst16_32<dag outs, dag ins, string asmstr, list<dag> pattern,
82 class MipsInst16_EXTEND<dag outs, dag ins, string asmstr, list<dag> pattern,
92 class MipsPseudo16<dag outs, dag ins, string asmstr, list<dag> pattern>:
103 class FI16<bits<5> op, dag outs, dag ins, string asmstr, list<dag> pattern,
118 class FRI16<bits<5> op, dag outs, dag ins, string asmstr,
119 list<dag> pattern, InstrItinClass itin>:
135 class FRR16<bits<5> _funct, dag outs, dag ins, string asmstr,
136 list<dag> pattern, InstrItinClass itin>:
[all …]
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| D | MipsEVAInstrInfo.td | 55 dag OutOperandList = (outs GPROpnd:$rt);
56 dag InOperandList = (ins mem_simm9:$addr);
58 list<dag> Pattern = [];
72 dag OutOperandList = (outs);
73 dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr);
75 list<dag> Pattern = [];
86 dag OutOperandList = (outs GPROpnd:$rt);
87 dag InOperandList = (ins mem_simm9:$addr, GPROpnd:$src);
89 list<dag> Pattern = [];
99 dag OutOperandList = (outs);
[all …]
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| D | Mips32r6InstrInfo.td | 181 dag OutOperandList = (outs FGRCCOpnd:$fd);
182 dag InOperandList = (ins FGROpnd:$fs, FGROpnd:$ft);
184 list<dag> Pattern = [(set FGRCCOpnd:$fd, (Op FGROpnd:$fs, FGROpnd:$ft))];
249 dag OutOperandList = (outs GPROpnd:$rs);
250 dag InOperandList = (ins ImmOpnd:$imm);
252 list<dag> Pattern = [];
261 dag OutOperandList = (outs GPROpnd:$rd);
262 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
264 list<dag> Pattern = [];
271 dag OutOperandList = (outs GPROpnd:$rs);
[all …]
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| D | MicroMips64r6InstrInfo.td | 40 dag OutOperandList = (outs GPROpnd:$rt);
41 dag InOperandList = (ins GPROpnd:$rs, simm16:$imm);
43 list<dag> Pattern = [];
49 dag OutOperandList = (outs GPROpnd:$rs);
50 dag InOperandList = (ins GPROpnd:$rt, simm16:$imm);
60 dag OutOperandList = (outs RO:$rt);
61 dag InOperandList = (ins RO:$rs, PosOpnd:$pos, SizeOpnd:$size);
63 list<dag> Pattern = [(set RO:$rt, (Op RO:$rs, imm:$pos, imm:$size))];
80 dag OutOperandList = (outs GPROpnd:$rd);
81 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
[all …]
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| D | MicroMips32r6InstrInfo.td | 175 dag InOperandList = (ins GPROpnd:$rt, opnd:$offset);
176 dag OutOperandList = (outs);
264 dag InOperandList = (ins opnd:$offset);
265 dag OutOperandList = (outs);
303 dag OutOperandList = (outs GPROpnd:$rd);
304 dag InOperandList = (ins GPROpnd:$rt);
306 list<dag> Pattern = [];
315 dag OutOperandList = (outs);
316 dag InOperandList = (ins MemOpnd:$addr, uimm5:$hint);
318 list<dag> Pattern = [];
[all …]
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| D | MipsDSPInstrInfo.td | 263 dag OutOperandList = (outs ROD:$rd);
264 dag InOperandList = (ins ROS:$rs, ROT:$rt);
266 list<dag> Pattern = [(set ROD:$rd, (OpNode ROS:$rs, ROT:$rt))];
274 dag OutOperandList = (outs ROD:$rd);
275 dag InOperandList = (ins ROS:$rs);
277 list<dag> Pattern = [(set ROD:$rd, (OpNode ROS:$rs))];
285 dag OutOperandList = (outs);
286 dag InOperandList = (ins ROS:$rs, ROT:$rt);
288 list<dag> Pattern = [(OpNode ROS:$rs, ROT:$rt)];
295 dag OutOperandList = (outs ROD:$rd);
[all …]
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| /external/llvm/test/TableGen/ |
| D | Dag.td | 9 dag d = (X1 N);
15 // CHECK-NEXT: dag d = (X1 13)
26 dag d = (X2 N);
27 dag e = (N X2);
33 // CHECK-NEXT: dag d = (X2 Y2)
34 // CHECK-NEXT: dag e = (Y2 X2)
38 // Complex dag operator (F.TheOp).
49 dag Dag1 = (somedef1 1);
50 dag Dag2 = (a 2);
51 dag Dag3 = (F.TheOp 2);
[all …]
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| D | MultiPat.td | 16 class Pattern<dag patternToMatch, list<dag> resultInstrs> {
17 dag PatternToMatch = patternToMatch;
18 list<dag> ResultInstrs = resultInstrs;
23 class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
25 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
26 list<dag> pattern> {
28 dag OutOperands = oopnds;
29 dag InOperands = iopnds;
31 list<dag> Pattern = pattern;
78 dag pattern;
[all …]
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| D | Slice.td | 15 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
16 list<dag> pattern> {
18 dag OutOperands = oopnds;
19 dag InOperands = iopnds;
21 list<dag> Pattern = pattern;
65 multiclass scalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> {
68 !if(!empty(patterns),[]<dag>,patterns[0])>;
71 … !if(!empty(patterns),[]<dag>,!if(!empty(!tail(patterns)),patterns[0],patterns[1]))>;
74 multiclass vscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> {
77 !if(!empty(patterns),[]<dag>,patterns[0])>;
[all …]
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| D | TargetInstrSpec.td | 22 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
23 list<dag> pattern> {
25 dag OutOperands = oopnds;
26 dag InOperands = iopnds;
28 list<dag> Pattern = pattern;
74 dag pattern;
85 multiclass arith<bits<8> opcode, string asmstr, string intr, list<dag> patterns> {
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIInstrInfo.td | 31 class InstSI <dag outs, dag ins, string asm, list<dag> pattern> :
42 class Enc32 <dag outs, dag ins, string asm, list<dag> pattern> :
48 class Enc64 <dag outs, dag ins, string asm, list<dag> pattern> :
54 class SIOperand <ValueType vt, dag opInfo>: Operand <vt> {
145 class MIMG <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
182 class MTBUF <bits<3> op, dag outs, dag ins, string asm, list<dag> pattern> :
221 class MUBUF <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
258 class SMRD <bits<5> op, dag outs, dag ins, string asm, list<dag> pattern> :
279 class SOP1 <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> :
292 class SOP2 <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
[all …]
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| D | SIInstrFormats.td | 25 class VOP3_32 <bits<9> op, string opName, list<dag> pattern>
28 class VOP3_64 <bits<9> op, string opName, list<dag> pattern>
32 class SOP1_32 <bits<8> op, string opName, list<dag> pattern>
35 class SOP1_64 <bits<8> op, string opName, list<dag> pattern>
38 class SOP2_32 <bits<7> op, string opName, list<dag> pattern>
41 class SOP2_64 <bits<7> op, string opName, list<dag> pattern>
44 class SOP2_VCC <bits<7> op, string opName, list<dag> pattern>
48 string opName, list<dag> pattern> :
53 multiclass VOP1_32 <bits<8> op, string opName, list<dag> pattern> {
60 multiclass VOP1_64 <bits<8> op, string opName, list<dag> pattern> {
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 14 class InstSI <dag outs, dag ins, string asm, list<dag> pattern> :
94 class VOPAnyCommon <dag outs, dag ins, string asm, list<dag> pattern> :
104 class VOPCCommon <dag ins, string asm, list<dag> pattern> :
112 class VOP1Common <dag outs, dag ins, string asm, list<dag> pattern> :
119 class VOP2Common <dag outs, dag ins, string asm, list<dag> pattern> :
126 class VOP3Common <dag outs, dag ins, string asm, list<dag> pattern> :
246 class SOP1 <dag outs, dag ins, string asm, list<dag> pattern> :
256 class SOP2 <dag outs, dag ins, string asm, list<dag> pattern> :
269 class SOPC <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
283 class SOPK <dag outs, dag ins, string asm, list<dag> pattern> :
[all …]
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| D | SIInstrInfo.td | 346 class SGPRImm <dag frag> : PatLeaf<frag, [{
665 class SOP1_Pseudo <string opName, dag outs, dag ins, list<dag> pattern> :
672 class SOP1_Real_si <sop1 op, string opName, dag outs, dag ins, string asm> :
680 class SOP1_Real_vi <sop1 op, string opName, dag outs, dag ins, string asm> :
688 multiclass SOP1_m <sop1 op, string opName, dag outs, dag ins, string asm,
689 list<dag> pattern> {
699 multiclass SOP1_32 <sop1 op, string opName, list<dag> pattern> : SOP1_m <
704 multiclass SOP1_64 <sop1 op, string opName, list<dag> pattern> : SOP1_m <
710 multiclass SOP1_64_0 <sop1 op, string opName, list<dag> pattern> {
725 multiclass SOP1_1 <sop1 op, string opName, list<dag> pattern> {
[all …]
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| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrFormats.td | 10 class InstBPF<dag outs, dag ins, string asmstr, list<dag> pattern>
22 dag OutOperandList = outs;
23 dag InOperandList = ins;
29 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrFormats.td | 14 class InstSystemZ<int size, dag outs, dag ins, string asmstr,
15 list<dag> pattern> : Instruction {
18 dag OutOperandList = outs;
19 dag InOperandList = ins;
161 class InstRI<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
175 class InstRIEb<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
194 class InstRIEc<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
212 class InstRIEd<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
229 class InstRIEf<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
249 class InstRIL<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
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